Greetings from The Center for Semiconductor Technologies (SemiX) at IIT Bombay!!!

[STMicroelectronics](https://www.linkedin.com/company/stmicroelectronics/) is organizing online lectures in association with [SemiX IIT Bombay](https://www.linkedin.com/in/ACoAAEQCjmcBzPFNmBDaaS3PGNrvoSxwcokJh50) on the coming Wednesday, i.e., 6th September 2023. It is online and free of any participation fee.

Mode: Online on MS Teams (Link for registration: https://events.teams.microsoft.com/event/6b137372-15dc-40e9-b12f-9d5514627a85@403ee5f4-55b3-45cd-8ae2-824be887a075)

Date:6.09.2023

Time: 2:30 – 5:30 pm

Lecture one: Practical Challenges in the Design of High-Speed SerDes

This session will discuss the real-life application requirements that drive the development of differentiated SerDes transmitters. It will cover the specific design challenges faced in meeting such requirements and how those are addressed.

Speaker bio: Kirtiman Singh Rathore, Principal Engineer, STMicroelectronics, Greater Noida

Kirtiman Singh Rathore is working as a Principal Engineer in STMicroelectronics(Greater Noida), where he is leading the development of high-speed SerDes. He received his Bachelor’s degree in Electrical and Electronics Engineering from BITS Pilani and has 20 plus years of experience in the design of analog and mixed-signal circuits, including differentiated SerDes, SAR ADCs, LDO regulators etc. His areas of interest include low voltage analog design, high-speed transceiver circuits and signal integrity techniques.

Lecture Two: Analog Layout Techniques for High-Performance Analog Circuits

The lecture aims to educate the student on the challenges and recent advances in analog layout designs, verification checks and industry-standard tools to have best-in-class products.

Speaker bio: Rajeev Singh, Senior Manager, STMicroelectronics, Greater Noida

Rajeev is working as Design Manager at STMicroelectronics Ltd. He has over 13+ years of experience with STMicroelectronics and currently leads the physical implementation team for analog IP’s like PLL and Oscillator. He received the B.Tech degree in Electronics and communication Engineering and the M.Tech degree in VLSI Design. His areas of interests are building automation on yield improvement techniques and productivity enhancement techniques.

Link for registration: https://events.teams.microsoft.com/event/6b137372-15dc-40e9-b12f-9d5514627a85@403ee5f4-55b3-45cd-8ae2-824be887a075

Co-sponsored by: Prof Sandip Mondal

Speaker(s): Kirtiman Singh Rathore, Rajeev Singh

Virtual: https://events.vtools.ieee.org/m/372548