Past Events from 2004 to 2012

            1. Annual General Body Meeting on Saturday 19th January 2013 at 6.30 pm at RBYC, Mumbai.
            2. Saturday 6th October 2012,
              “Year 2012 Prof K Shankar Student Paper and Project Contest”
              Venue: Shah and Anchor Kutchhi Engineering College, Mumbai
              The last date for Submitting the Papers and Project : Saturday 22nd September 2012
            3. Wednesday, 21st March, 2012, 1130 hrs
              “Telecom – 3G/4G Wireless Imperative for India”
              by Dr Suresh Borkar, Illinois Institute of Technology, USA
              Venue: GTL Limited, Conference room, First Floor, Electronic Sadan II (ES-II), TTC, MIDC, Mahape, Navi Mumbai 400710 (for help with directions, please call 022-27684111 / 9819983688) ,Landmark – Near Mahape Circle.
              Contact: Sachin Gavankar,  +91 9819983688 Email : sachingavankar@gtllimited.com

              Abstract:
              India currently has a very wide voice oriented 2G cellular technology based network. In order for India to continue on its pursuit of providing quality life to all its citizens and accelerate the pace of national growth, it is an imperative to provide broadband access and packet transport based network across the country. A nationwide broadband network is needed to provide education, healthcare, banking and other services to all the villages and towns. Key services like telemedicine, e-commerce, e-banking and e-government can be made available through high-speed Internet connection. It is very important that based on the goals and issues relating to the Indian environment, informed decisions be taken on the strategy and introduction of 3G and 4G broadband access technologies including 3GPP WCDMA/HSPA, 3GPP2 CDMA2000, 4G LTE, and 4G WiMAX. This seminar identifies the attributes, parameters, and the relevance of these technologies for India’s environment. Perspectives are provided on mitigating key issues including affordability, digital divide, urban and rural gap, and relevance of appropriate services and applications. The seminar also covers related topics including applicability of global processes and perspectives to Indian environment, developing a balance between regulations and competitive rules, and the need for indigenous telecom product manufacturing. Specific scenarios are covered based on the use of varying mixes of the 3G WCDMA/HSPA, 4G LTE, and 4G WiMAX technologies. Emphasis is placed on recognition of Telecom as a critical part of national growth, uniformity and consistency of policies, and adequate and predictable availability of spectrum.
              About the Speaker:
              Dr. Suresh Borkar is a faculty member at the Illinois Institute of Technology and also a Senior Principal Investigator at Roberson and Associates, a technology and management company in Chicago. Previously, he was with AT&T/Lucent Technologies/Alcatel-Lucent (ALU) for over 26 years responsible for various facets of product management, systems engineering, architecture, development, integration and testing, and customer management in Computer and Networking systems, Wireline Switching systems, Data systems, and Wireless systems. He was the Director for Customer Management for 3G mobility systems responsible for customer positioning, acceptance, and revenue realization. He was also the Chief Technology Officer and Managing Director, Lucent India Inc. responsible for Lucent customer, products, and business activities in India.
              Dr. Borkar was awarded the B. Tech. in EE from IIT Delhi (India) and M.S. and Ph. D. in ECE from Illinois Institute of Technology, Chicago.

            4. Tuesday, 21st February, 2012, 1700 hrs
              “Green Cellular Networks: A Survey, Some Research Issues and Challenges”
              by Dr Vijay Bhargava, University of British Columbia, Vancouver, Canada, President, IEEE Communications Society
              Venue: Thadomal Sahani Engineering College, Bandra (W), Mumbai
              Jointly with IEEE ComSoc Bombay Chapter

              Abstract:
              In this talk, we present techniques to enable green communications in future generation of wireless systems that will rely on cooperation and cognition to meet increasing demand of high data rate. So far, achieving high data rate has been the primary focus of research in cooperative and CR systems, without much consideration of energy efficiency. However, many of these techniques significantly increase system complexity and energy consumption. Escalating energy costs and environmental concerns have already created an urgent need for more energy-efficient “green” wireless communications. Therefore, we need to design energy-efficient solutions for cooperative and cognitive networks, which will potentially drive the future generation of wireless communication. We focus on several important topics that are crucial towards reducing the energy consumption of the cognitive and cooperative networks. These topics include efficient base station redesign, heterogeneous network deployment, green communications via cognitive radio, cooperative relays to deliver green communications, and energy efficient cognitive cooperative networks.
              About the Speaker:
              Vijay Bhargava, an IEEE Volunteer for three decades, is Professor in the Department of Electrical and Computer Engineering at the University of British Columbia in Vancouver, where he served as Department Head during 2003-2008. Previously he was with the University of Victoria (1984-2003) and Concordia University (1976-84). He received his Ph.D. from Queen’s University in 1974. He is a fellow of the IEEE, the Royal Society of Canada, the Canadian Academy of Engineering and the Engineering Institute of Canada
              Vijay has served on the Board of Governors of the IEEE Information Theory Society and the IEEE Communications Society. He has held important positions in these societies and has organized conferences such as ISIT’83, ISIT’95, ICC’99 and VTC 2002 Fall. He played a major role in the creation of the IEEE Transactions on Wireless Communications, and served as its editor-in-chief during 2007, 2008 and 2009. He is a past President of the IEEE Information Theory Society and is currently serving as the President of the IEEE Communications Society.

            5. “Annual General Body Meeting”… Notice…Saturday 7th January 2012

     

          1. Friday, 23rd December, 2011, 1430 hrs
            “From Deep Trenches to Skyscrapers: The evolution of embedded memory at IBM”
            by Dr. Subramanian S. Iyer, Chief Technologist & IBM Fellow Microelectronics Division, IBM Systems& Technology Group
            Venue: GG Conference Room, Girish Gaitonde Building Second Floor, EE Department, IIT Bombay
            Jointly with IEEE AP/ED Bombay Chapter

            Abstract: Memory technology and the memory business has for many years been the engine that powered technological innovations in the semiconductors especially in the area of lithography and innovative micro-structural engineering. While stand alone memory itself has been commoditized, when embedded in high performance logic it provides incredible leverage for high performance processors, network and mobile appliances, and almost every application. In this talk, we will explore the course of memory in systems, especially eDRAM, the integration of deep trench technology into high performance logic, the value it brings as well as the collateral advantages it has brought about in power management, noise decoupling, autonomic chip repair and its potential evolution into 3-dimensional chip technology. We will examine in detail the technology considerations for the implementation 3Di in a logic environment as well as extensions into wafer-scale 3D integration.
            About the Speaker: Subramanian S. Iyer is IBM Fellow and Chief Technologist at the Microelectronics Division, IBM Systems& Technology Group, and is responsible for technology strategy and competitiveness, embedded memory and 3 Dimensional Integration. Until recently he was Director of 45nm CMOS Development. He obtained his Bachelor of Technology in Electrical Engineering at the Indian Institute of Technology, Bombay, and his M.S. and Ph.D. in Electrical Engineering at the University of California at Los Angeles. He joined the IBM T. J. Watson Research Center in 1981 and was manager of the Exploratory Structures and Devices Group till 1994, when he founded SiBond LLC to develop and manufacture Silicon-on-insulator materials. He has been with the IBM Microelectronics Division since 1997. Dr. Iyer has received two Corporate awards and four Outstanding Technical Achievement awards at IBM for the development of the Titanium Salicide process, the fabrication of the first SiGe Heterojunction Bipolar Transistor , the development of embedded DRAM technology and the development of eFUSE technology. His current technical interests and work lie in the area of 3-dimensional integration for memory sub-systems and the semiconductor roadmap at 22nm and beyond. He holds over 40 patents and has received 22 Invention Plateau awards at IBM and is a Master Inventor. He received the Distingushed Aluminus award from the Indian Institute of Technology, Bombay in 2004. Dr. Iyer has authored over 150 articles in technical journals and several book chapters and co-edited a book on bonded SOI . He has served as an Adjunct Professor of Electrical Engineering at Columbia University, NY. Dr. Iyer is a Fellow of IEEE and a Distinguished Lecturer of the IEEE and Chair of the mid-Hudson chapter of the Electron Device Society. In 2011 he received the Asian American Engineer of the Year award. He is the recepient of the 2012 IEEE Daniel Noble medal for emerging technologies. In his spare time, he studies Sanskrit and role of Indic languages, traditions and culture in different parts of the world.

          Tuesday, 29th November, 2011, 1545 – 1645 hrs
          “System Virtualization”
          by Mr. Mallesh,IBM
          Venue: GG Conference room, 2nd Floor ,Girish Gaitonde Building, IIT Mumbai
          Jointly with IEEE AP/ED Bombay Chapter
          Abstract: Businesses today have to maximize the return on investment in information technology. Their IT infrastructure should have the flexibility to adapt to the varying business computing requirements and scale to handle ever expanding workloads without adding complexity. System virtualization is the solution for this requirement which presents computing resources in ways that users and applications can easily get value out of them. Virtualization helps the users to consolidate their workloads to reduce the hardware cost, workload optimization, IT flexibility and responsiveness. Virtualization is spread across different components such as Hypervisor, CPU, Memory, I/O and Operating System. This session provides a detailed overview of virtualization products along with virtualization technology used in the System virtualization environment.
          About the Speaker: Mallesh has 11 years of experience at IBM in AIX development and customer support. He is a recognized expert in several aspects of AIX operating system design and development, particularly in the areas of Communication Protocols, Virtualization, RAS (Reliability, Availability & Serviceability), OS Memory Management. He was recognized for his role in supporting the customers in these areas and currently he is working on design and development of AIX Virtualization software features. He holds patents and published multiple disclosures. Mallesh has Bachelors degree in Electronics and Communication Engineering from Bangalore University (UVCE).

    Tuesday, 29th November, 2011, 1430 – 1530 hrs
    “Storage Networks Explained”
    by Mr. Ulf Troppens,IBM
    Venue: GG Conference room, 2nd Floor ,Girish Gaitonde Building, IIT Mumbai
    Jointly with IEEE AP/ED Bombay Chapter
    Abstract: Storage quantities are growing because we are storing more and more data digitally. Data is spread across a broad range of devices ranging from USB sticks and mobile devices to large data centers which host web applications. The amount of data of an average company doubles every year. Thus, companies who own 100 Terabyte of data today will own 3.2 Petabyte in five years. Storage networks help to tame such data quantities and to manage this data growth efficiently. Since stored data and information are the biggest asset of any company, anyone who is involved in the planning or the operation of IT systems requires a basic knowledge of the principle and the use of storage networks. This talk gives an introduction into key concepts of storage networks.
    About the Speaker: Ulf Troppens is a senior software engineer with IBM. He joined IBM Mainz, Germany in 1997 and is currently on assignment at the IBM India Storage Lab in Pune. Ulf has broad experience in the architecture, design, development, test, sales and support of storage systems. He holds ten patents and is author of the award winning book ‘Storage Networks Explained’. Ulf has a diploma (similar to Master of Science) in computer science of University of Karlsruhe, Germany

    Tuesday, 18th October, 2011, 1500 hrs
    “Spectrum Sensing for Cognitive Radio” Fundamental Limits and Multiple Antennae Based Methods
    by Prof. Marco Chiani from University of Bologna, Italy
    Venue: IEEE-SAKEC , Chembur, Mumbai
    Jointly with IEEE-SAKEC
    Saturday, 20th August, 2011,
    “Embedded Systems”
    by Abhay Phansikar
    Venue: Fr. CRCE , Mumbai
    Thursday, 18th August,2011, 1500 hrs
    “Chameleon and Multi-Type Protection Intelligent Electronic Device”
    by Dr Tarlochan S. Sidhu, FIEEE
    Venue: GG seminar room, Electrical Engineering Department, I I T Bombay.
    Jointly with IEEE IAS/PES Chapter of Bombay Section
    Contact: Prof S. A. Khaparde, Chair of IAS/PES Chapter of IEEE Bombay Section.
    Abstract: Introduction of IEC61850 standard has provided many new opportunities for improving protection and automation functions with a substation. This new standard and related communication infrastructure has the capability to facilitate a smart substation with a new paradigm for providing protection functions. One of the possible improvements in the protection functionality can be implementation of a multi-type protection IED within a substation. The multi-type protection IED indicates a new concept that allows remote changes to protection functionality within IEDs. This method presents an effective measure for enhancing protection reliability in the event of a merging unit and IED failure. At the same time, it also has the potential to decrease protection costs by consolidating backup protection functions. This talk will start with an overview of the IEC61850 standard for substation automation and protection. This will be followed by a description of multi-type protection IED that can be achieved within the new environment using IEC61850. Laboratory implementation and test results for the multi-type IED will be presented. Testing showed that a multi-type IED can take over the functioning of a failed primary IED without much delay.
    About the Speaker: Tarlochan S. Sidhu received the B.E (Hons.) degree from Thapar Institute of Engineering and Technology, Patiala, India, in 1979 and the M.Sc. and Ph.D degrees from the University of Saskatchewan, Saskatoon, SK, Canada in 1985 and 1989, respectively. He worked for the Regional Computer Center, Chandigarh, India, Punjab State Electricity Board, India, and Bell-Northern Research Ltd., Ottawa, Canada. From July 1990 to June 2002, he was with the Department of Electrical Engineering, University of Saskatchewan, where he served as Professor and Graduate Chairman of the Department. He is currently Professor and Chair of the Electrical and Computer Engineering Department at the University of Western Ontario, London, Ontario, Canada. He is also the NSERC/Hydro One Networks Senior Industrial Research Chair in Power Systems Engineering. He regularly contributes to the activities of IEEE Power Systems Relaying Committee and served as Chair of its Relaying Practices Subcommittee from 2007-9. He has published more than 200 papers in various journals and conferences, and some of these papers have won major awards. He is regularly invited to give lectures/tutorials around the world on the subject of power system protection, automation and monitoring. He has served regularly as a consultant to power system industries both nationally and internationally. More than 50 graduate students have completed their thesis work under his supervision/co-supervision. He serves as the Editor-in-Chief of the International Journal of Emerging Electric Power Systems, an Editor of the IEEE Trans. ,On Power Delivery and that of IEEE Power Engineering Letters. He is on the editorial boards of Electric Power Systems Research, Electric Power Machines and Components, and Relay (China). Tarlochan is a Fellow of the Institution of Engineers (India), a Fellow of the Institution of Engineering and Technology (U.K), a Fellow of the Engineering Institution of Canada, a Fellow of the Canadian Academy of Engineering and a Fellow of the Institute of Electrical and Electronics Engineers (USA).

    Wednesday, 3rd August,2011, 1100 hrs
    “Public Safety of National Broadband Network”
    by Dr. Suresh Borkar, Illinois Institute of Technology, USA
    Venue: Tech Mahindra, Oberoi Garden Estate, Chandivali, Mumbai 400 072
    Jointly with IEEE Bombay ComSoc Chapter
    Contact: Ms Shruti on shrutima@TechMahindra.com by Friday July 29, 2011. Tel 6688 8220
    Abstract: It is of the highest national priority to provide public safety with a nationwide, interoperable, broadband wireless network especially in disaster situations. In the US, 3GPP Long Term Evolution (LTE) is considered the appropriate technology for such an application. It is expected that, in addition to the dedicated LTE based broadband network, the public safety user will have access to commercial networks for nationwide access during the period of public safety network build out or where only the commercial network is present especially in the rural areas. This presentation, based on a recent study submitted to US Federal Communications Commission (FCC), presents the packet transport and LTE access based architectural solution and illustrates how this solution using both the dedicated public safety and the commercial networks meets the public safety priority requirements. The multiple priority mechanisms defined in the LTE standards that support the priorities for public safety radio admission, user traffic bearer assignments, Quality of Service (QoS) treatment, and preemption are highlighted. Simulation results are presented illustrating the robust priority management in both the dedicated and the shared commercial environments.
    This critical study addresses the concerns relating to the priority treatment for public safety priority users especially in the shared commercial environment and forms the basis for defining the strategies and enabling the architectural decisions for nationwide public safety broadband network.
    About the Speaker: Dr. Suresh Borkar is a faculty member at the Illinois Institute of Technology and also a Senior Principal Investigator at Roberson and Associates, a technology and management company in Chicago. Previously, he was with AT&T/Lucent Technologies/Alcatel-Lucent (ALU) for over 26 years responsible for various facets of product management, systems engineering, architecture, development, integration and testing, and customer management in Computer and Networking systems, Wireline Switching systems, Data systems, and Wireless systems. He was the Director for Customer Management for 3G mobility systems responsible for customer positioning, acceptance, and revenue realization. He was also the Chief Technology Officer and Managing Director, Lucent India Inc. responsible for Lucent customer, products, and business activities in India. Dr. Borkar was awarded the B. Tech. in EE from IIT Delhi (India) and M.S. and Ph. D. in ECE from Illinois Institute of Technology, Chicago.

    Sunday, 3rd July, 2011, 1100 hrs
    “TIFR@Prithvi – Chai and Why?”
    by Onkar Dabeer , TIFR
    Venue: Prithvi Theatre, Juhu
    Abstract: “2G, 3G, 4G… Yeh kya hai ji?!” . We are hooked to our mobile phones – talking, texting, browsing, tweeting, clicking, gaming – many of us just cannot live without them. The underlying technologies termed 2G/3G are much in news today (for good and bad reasons). But what is 2G, 3G, and the impending 4G? What principles underlie these technologies? Where is wireless communications headed?
    About the Speaker: Onkar Dabeer (http://www.tcs.tifr.res.in/~onkar) is a faculty member in the School of Technology and Computer Science, TIFR. His research interests are in estimation theory and practice (with focus on datasets arising in web and social media), and multi-Gbps wireless communications. He serves on editorial board of the IEEE Transactions on Wireless Communications. Chai and Why? is on facebook! Find us at www.facebook.com/chaiandwhy

    Thursday, 9th June, 2011,
    Invited paper at the IEEE International Microwave Symposium IMS-2011, Baltimore MD
    “Microwave Engineering in India : Challenges and New Opportunities”
    by Dr M V Pitke , Chair IEEE Bombay Section
    Tuesday, 17th May, 2011, 1000 hrs
    “43 rd WORLD TELECOMMUNICATION AND INFORMATION SOCIETY DAY”
    “Better Life in Rural Communities with ICTs”
    by Dr M V Pitke formerly of Tata Institute of Fundamental Research, Mumbai
    Venue: Conference Hall, Doordarshan Kendra, Worli , Mumbai – 4000 25
    Jointly with IETE Mumbai Centre, IEEE ComSoc Bombay Chapter, IEEE AesCom India Chapter, IET Mumbai Network, BES(I) Mumbai Chapter
    Sunday, 17th April, 2011,
    “Dinner Meeting with Dignatories of the IEEE ED Society and DLs along with IEEE Bombay Execom” Dr Renuka Jindal, President, IEEE Electron Devices Society and EDS chapter chairs of the Southeast Asia region
    Thursday, 17th March, 2011, 1130 hrs
    “Building a Semiconductor Fab Business in India, From Greenfield to Profitability”
    by Dr. Raminderpal Singh, Strategy Manager, IP Licensing & Alliances, IBM Senior Technical Staff Member
    Venue: EE seminar room, 2nd Floor (opposite EE Office), Girish Gaitonde, Building, IIT Mumbai
    Jointly with IEEE AP/ED Bombay Chapter
    Abstract: In this talk, we will touch upon many of the key infrastructure, business, and technology challenges that India faces in building a successful fab in India. This is an often discussed goal, with many obstacles in a tough global industry. The discussion will not answer all the questions or provide a specific solution, but experienced observations and background will be used provide a framework for technologists in India to debate. Finally, we will have include time for open discussion and ideas from the audience.
    About the Speaker: Raminderpal Singh received his Bachelors of Engineering in 1991, at Imperial College, London University. He then spent a year as a venture capitalist with 3i plc (UK). Dr. Singh received his Ph.D. in Electrical Engineering (1997) from Newcastle University (UK). He then worked for Cadence Design Systems (1997-2001). In March 2001, Dr. Singh joined IBM’s RF/Mixed-Signal Design Kit Group (Burlington, VT), where he was Senior Engineering Manager. In 2004, he moved to IBM’s Fishkill location for the 300mm fabrication facility. After spending 2 years as a business analyst covering the semiconductor industry, Dr. Singh joined IBM’s IP Licensing and Alliances team where he is currently a Strategy Manager for hardware-focused opportunities. Dr. Singh has authored and co-authored numerous technical publications, including 2 books and several chapters for books. In 2003, Dr. Singh was named by EETimes as one of the top thirteen Influencers in the Semiconductor industry. Additionally, he has been leading industry working groups for close to ten years, starting with the industry’s first signal integrity standard developed at the VSIA and developing the IPe Ecosystem series of projects at the GSA.

    Wednesday, 9th March, 2011, 1500 hrs
    “Photovoltaics: Dominant Role in Green Electricity Generation in the 21st Century”
    by Prof. Rajendra Singh, FIEEE, a Distinguished Lecturer of the IEEE EDS, D. Houser Banks Professor, Holcombe Department of Electrical Engineering & Centre for Silicon Nanoelectronics Clemson University, USA
    Venue: EE seminar room, 2nd Floor (opposite EE Office), Girish Gaitonde, Building, IIT Mumbai
    Jointly with IEEE AP/ED Bombay Chapter and National Centre for Photovoltaic Research and Education, IIT Bombay.
    Wednesday, 2nd March, 2011, 1500 hrs
    “TCAD Present State and Future Challenges”
    by Terry Ma, CTO, Synopsys Inc
    Venue: EE seminar room, 2nd Floor (opposite EE Office), Girish Gaitonde, Building, IIT Mumbai
    Jointly with IEEE AP/ED Bombay Chapter
    Abstract: The talk will cover the use of TCAD in state-of-the-art semiconductor CMOS, memory, power and photovoltaic devices.
    About the Speaker: Terry Ma joined Synopsys in February 2005 and is currently Vice President, Engineering of the Technology CAD Business Unit within the Silicon Engineering Group. He leads the TCAD R&D and Consulting & Engineering Services team, which delivers TCAD products and solutions enabling semiconductor manufacturers to explore, develop and optimize semiconductor technologies. Terry has over 25 years of experience in semiconductor manufacturing and technology modeling. He received his Bachelor of Science degree in Chemical Engineering from University of California, Berkeley, and graduated with a Master of Business Administration degree from the Kellogg School of Management at Northwestern University.

    Monday, 28th February, 2011, 1500 hrs National Science Day 2011
    Public Lecture at IEEE-360 event “Frontiers of Communications: Multi-Gbps Systems and Social Media”
    by Dr. Onkar Dabeer, TIFR, Mumbai
    Venue: Atharva College of Engineering, Malad, Mumbai
    Abstract: Everyday we are plugged into a variety of devices and services to communicate with others: cell phones, computers, Gmail, Facebook, Twitter, etc. This rich ecosystem did not exist ten years back and several innovations are expected in the near future. In this talk, I will give an overview of the research we are conducting at TIFR into various aspects of this ecosystem. In particular, I will try to address the questions: a) How do we design a wireless communication system to download a full movie in less than a minute? b) At what time should you tweet? I will also give an outline of the mathematical tools needed to understand these issues.
    About the Speaker: Onkar Dabeer got his B.Tech (1996), M.Tech (1998) from IIT Bombay and his PhD (2002) from the University of California at San Diego. Since Aug 2004, he is on the faculty of School of Technology and Computer Science, Tata Institute of Fundamental Research, Mumbai. His research interests are in estimation theory and practice (with focus on datasets arising in web and social media datasets), and multi-Gbps wireless communications. Since Dec 2008, he serves on editorial board of the IEEE Transactions on Wireless Communications. http://www.tcs.tifr.res.in/~onkar

    Wed-Thurs, 23rd-24th February, 2011, Two day National Seminar
    “Recent Developments in Circuits, Systems and Signal Processing”
    Venue: St. Francis Institute of Technology (SFIT), Borivli(W) , Mumbai
    Jointly with IEEE SFIT Student Branch
    Friday, 11th February, 2011, Full day
    “One day Workshop on Low Cost Wireless Communication”
    Venue: UMIT, SNDT, Mumbai
    Jointly with IEEE ComSoc Bombay Chapter
    Friday, 4th February, 2011, 1400-1700 hrs
    “IEEE Cloud Computing Workshop”
    Venue: Fr. Conceicao Rodrigues College of Engineering ,Fr Agnel Ashram, Bandstand, Bandra (W), Mumbai
    Jointly with IEEE Standards Association
    Friday, 4th February,2011, 0900-1200 hrs
    “IEEE Smart Grid Workshop”
    Venue: Sardar Patel Institute of Technology (SPIT), Munshi Nagar, Andheri (West), Mumbai 400 058
    Jointly with IEEE Standards Association
    Saturday, 8th January,2011, 1730 hrs
    “Energy Strategies of India, China and the U.S.: A Comparative Analysis”
    by Dr Vikram Dalal, Whitney Professor of Electrical and Computer Engineering at Iowa State University, USA.
    Venue: Thadomal Shahani Engg College , Bandra, Mumbai
    Jointly with IEEE EDS Bombay Chapter
    Contact: Prof. Uday Khot,IEEE-TSEC Students Branch Counselor
    “Annual General Body Meeting”… Notice…Saturday 11th December 2010
    Slate given by Nominations Committee
    Draft Minutes of last AGM
    Secretary Report
    Fri-Sun, 24-26 Sept 2010
    “All India Student Congress AISC2010”
    “Additional Details”
    Venue: Fr Conceicao Rodrigues College of Engineering , Bandra West, Mumbai -400050
    Jointly with IEEE India Council and IEEE-CRCE
    Saturday, 25 Sept 2010 0930-1630 hrs
    “Workshop – Next Gen Platforms for Next Gen Developers”
    Venue: Modern College of Engineering, 1186/A, Shirole Rd, Shivaji Nagar, Pune, 411005
    Jointly with IEEE ComSoc Bombay Chapter and IEEE Pune Subsection
    Saturday, 4th September,2010, 1030-1230 hrs
    “Emerging trends in the wireless industry – New revenue opportunities for the wireless service providers”
    by Prashant Sinha, Delivery Manager, Infosys, Pune India
    Venue: Room # A36, 3rd floor, MES’s College of Engineering (old building), Wadia college campus
    Jointly with IEEE ComSoc Bombay Chapter
    Contact: Prof. (Mrs.) Manisha Dale, Head -E &TC Department – manishadale@yahoo.com Mobile: 94223 62809 MES’s College of Engineering, 19, Late Prince VK Joag Path Pune – 411 001 Maharashtra
    Abstract: Wireless industry across the world is going through a significant change, primarily because of decreasing ARPU and saturated mobile penetration. Wireless service provider need to create new revenue generating opportunities to be able to sustain amidst fierce competition from Cable MSOs and OTT players. This topic delves into some of the exciting new opportunities that exist with the wireless service providers
    About the Speaker: Prashant is a Delivery Manager at Infosys. He has 21 years of industry experience in the telecom industry, primarily in wireless and wireline networks, B/OSS and VAS areas. He has been with Infosys for over 9 years. Prior to Infosys, he was working for Ericsson for 7 years and at Bharat Electronics for 5 years. He has incubated and developed the wireless CoE for Communication, Media and Entertainment vertical of Infosys, providing value added services to clients.

    Monday, 23rd August,2010, 1500hrs
    “Nanowire Transistors for Thin-Film and Transparent Applications”
    by David B. Janes, School of Electrical and Computer Engineering & Birck Nanotechnology Center, Purdue University, West Lafayette, IN 47907-1285
    Venue: EE-105, EE Main Building, IIT Bombay
    Jointly with IEEE AP/ED Bombay Chapter
    Abstract: Semiconductor nanowires are interesting as transistor channel materials, offering the possibility of relatively high performance devices which can be integrated on a variety of substrates. One possible application involves thin-film transistors, which would enable large-area electronics operating at RF frequencies. We have demonstrated thin-film transistors in flexible and transparent formats and demonstrated basic circuits, including drive circuitry for organic light-emitting diode displays [1-2] While many reports have demonstrated specific I-V relationships, there is a lack of simple models for device operation in regimes where contact injection, e.g. by tunneling, dominates the I-V relationships.
    Low-frequency (1/f) noise studies have been reported, but generally describe the noise in terms of the bulk Hooge model, in which the Hooge parameter (aH) is typically quoted as a constant for a given device.
    In order to understand the effects of contacts and noise mechanisms and evaluate potential circuit performance, nanowire transistors employing several channel materials, including ZnO, In2O3 and InAs, have been studied [3-4]. The use of organic gate dielectrics and appropriate control of the interfaces, including contacts, yields on/off ratios of 107 and “on” currents as high as 10 uA per nanowire. The various channel materials, nanowire diameters and channel lengths allow tuning of both the device electrostatics, e.g. characteristic band bending lengths at the contacts, and the general transport parameters, e.g. tuning toward quasi-1-D density of states and quasi-ballistic transport. Although simple field-effect mobility models are typically used to evaluate nanowire transistors, the overall I-V characteristics can generally be understood in terms of injection across gated barriers at the contacts, rather than in terms of mobility.
    Low-frequency (1/f) noise has been studied as a function of bias point, in order to determine how the nanowire transistor noise compares to classical noise models [5]. While the data generally fits the Hooge relationship (i.e. noise current power proportional to ID2 and inversely proportional to number of carriers), the Hooge parameter is a strong function of bias. Noise properties can be changed significantly both by control of the nanowire interfaces and by modification of the contacts. These relationships allow evaluation of the relative contributions of interface states and contacts to the overall noise properties, and provide insights into the conduction mechanisms within the devices.
    About the Speaker: David B. Janes received the B.A. degree in Physics from Augustana College in 1980 and the B.S.E.E., M.S.E.E. and Ph.D. degrees from the University of Illinois at Urbana-Champaign in 1980, 1981 and 1989, respectively. From 1981 to 1985, he worked as a research scientist at the Research Division of Raytheon Company, where he worked on microwave devices and integrated circuits. Since 1989, he has been at Purdue University, where he is a Professor of Electrical and Computer Engineering. From 2001-2003, he was Research Program Coordinator for the Birck Nanotechnology Center. From 2003-2007, he was Technical Director of the Institute for Nanoelectronics and Computing, a NASA-supported center. Current projects include development of molecular electronic components, nanowire/nanotube transistors, and chemical sensors.

    Friday, 30th July,2010, 1545-1730hrs
    “New Trends in Enterprise Communication”
    by Dr. Ram Kashi, Senior Research Scientist, Avaya India
    Venue: Seminar hall w 306, Bharati Vidyapeeth College of Engineering, Pune
    Jointly with IEEE ComSoc Bombay Chapter
    Abstract: There has been a significant shift in enterprise communications over the last decade. This talk will describe on the impact of social media, the ability to provide context aware communications and the capabilities of new endpoints to enhance productivity in enterprise users
    About the Speaker: Dr. Ramanujan Kashi is a senior Research Scientist, Multimedia Technologies Research at Avaya. He and his team contribute to Avaya’s research in document image processing, SMS and digital ink, user authentication, collaboration and e-learning, streaming video, self-service systems, and the use of these technologies in Avaya’s CRM and VoIP offers. Ram obtained his Bachelors from Mysore University, Masters and Doctoral degrees from Rutgers University in New Jersey, USA. Soon after, he joined AT&T Bell Laboratories at Murray Hill in 1994 as Member of Technical Staff, transferred to Lucent Bell Labs in 1996 and to Avaya Labs Research in 2000. In 2004, he relocated to India to start a research group in multimedia at the company’s wholly owned subsidiary called Avaya India Private Limited. He has numerous book chapters, edited a book on document processing and over forty publications and seven patents.

    Tuesday, 13th July,2010, 1600hrs
    “Hydrogen and Helium in Si: Phenomena Obscure and Not-so-Obscure ”
    by Prof. S. Ashok , Department of Engineering Science, the Pennsylvania State University
    Venue: GG Conference Room, GG Building Second Floor, EE Department (opposite EE office), IIT Bombay
    Jointly with IEEE AP/ED Bombay Chapter
    Abstract: The influence of the light elements H and He on the electronic and structural properties of crystalline Si is of considerable practical interest in Si defect/impurity engineering. H interaction with c-Si has been studied for nearly three decades, and it encompasses many a phenomenon such as dopant- hydrogen complexes, passivation of defects, hydrogen-induced defects, and enhanced thermal donor (TD) formation. Applications are as varied as improving gate oxide integrity, decreasing hot carrier-induced degradation, grain boundary passivation and wafer splitting. In our work, we have uncovered additional phenomena relating to trapping and de-trapping of H by defects, interaction with ion implantation damage, thermal activation of latent defects in hydrogenated c- Si, and low-temperature activation of ion implanted dopant atoms. He differs from H principally by its electrical inactivity, but plays a significant role in altering the microstructure. The strong interaction between vacancy clusters and He result in nm-size cavities that are useful in gettering, localized minority carrier lifetime control and heteroepitaxy. This presentation will give an overview of the H- and He-related phenomena and potential applications in Si technology. Two distinguishing aspects of using hydrogen in Si will be identified: (i) Hydrogen present transiently or catalytically in one or more of the processing steps, yet performs a useful role in the end result. (ii) H permanently ensconced as a passivant in the finished device.
    About the Speaker: S. Ashok received his B.E. (Hons) degree from the P.S.G. College of Technology, Coimbatore, M.Tech. from the Indian Institute of Technology, Kanpur, and the Ph.D. from the Rensselaer Polytechnic Institute, Troy, NY, USA, all in Electrical Engineering. He joined the faculty of the Department of Engineering Science, the Pennsylvania State University, University Park, PA, in 1978, where he has been a Professor since 1987. His research interests over the years have been Schottky barriers, semiconductor surface/interface modification, plasma/ion beam process- induced defects, ion implantation, hydrogen in silicon, and photovoltaics. He initiated in 1992 and continued to co-organize a symposium on Semiconductor Defect Engineering, held regularly at Materials Research Society Spring meetings through 2007. He has held several sabbatical and summer appointments at universities and research labs around the world and given numerous seminars, review talks and short courses. He has also been in the organizing and program committees of many international conferences and served on many review boards. His most recent major undertaking has been as a meeting co-chair of the Fall 2008 Materials Research Society Meeting in Boston. He has authored or co-authored 210 publications and 160 conference presentations.

    Monday 12th July 2010,
    0930-1100hrs: Tutorial on : “Services Over IP: Implementation Options and Challenges”
    1130-1300hrs: Lecture on : “Converged Services and a new generation of Networking”
    by Dr. Bhumip Khasnabish
    Distinguished MTS at Verizon Laboratories,Waltham, Massachusetts
    Member Board of Editors of the Journal of Network and Systems Management
    Venue: PICT Auditorium, Pune
    Interested members are requested to register on or before 9 July 2010 by sending an e-mail to seminaratpict@gmail.com (Subject: Registration: Tutorial, Lecture or Both).
    (Note: Limited seats, confirmation of your registration will be sent through email)
    Jointly with IEEE ComSoc Bombay Chapter
    About the Speaker:
    Distinguished MTS at Verizon Laboratories, Waltham, Massachusetts.
    He works on various NGN projects related to delivering enhanced voice, data, and video services to business and residential customers.
    Worked in Bell-Northern Research (BNR) Ltd. designing, implementing, and leading implementation of trunking and traffic management software modules for Passport® multi-service switch.
    Authored/co-authored more than 150 patents, books, chapters, technical reports, Industry Standards contributions, and articles for various international archival journals, magazines, and referenced conference proceedings.
    His recent book entitled, “Implementing Voice over IP” [ISBN: 0-471-21666-6] is currently in second printing.
    He co-edited “Multimedia Communications Networks: Technologies and Services” [ISBN-10: 0890069360, ISBN-13: 978-0890069363].
    He is also a member of the Board of Editors of the Journal of Network and Systems Management
    He is an adjunct faculty member of Brandeis University and Bentley College.

    Saturday 10th July 2010
    Third Job Fair by IEEE Bombay Section
    Venue: SPIT (Sardar Patel Institute of Technology ), Andheri West, Mumbai
    Friday 9th July 2010
    “Converged Services and a New Generation of Networking”
    by Dr. Bhumip Khasnabish
    Distinguished MTS at Verizon Laboratories,Waltham, Massachusetts
    Member Board of Editors of the Journal of Network and Systems Management
    The above talk will be held at two locations:
    1030-1330hrs
    Venue: “Mini Auditorium”, S.N.D.T Women’s University, Sir Vithal Das Vihar, Juhu Campus, Santacruz(W) Mumbai 400059
    1430-1700hrs
    Venue:TCS-Nortel Lab, Raheja estate, Kulupwadi raod, Borivali (East) Mumbai -400066
    Interested members for lecture scheduled at SNDT are requested to register on or before 9 July 2010 by sending an e-mail to Dr.Pawar sanjayspawar@rediffmail.com (Subject: Registration: Lecture ).
    (Note: Limited seats, confirmation of your registration will be sent through email)
    Jointly with IEEE ComSoc Bombay Chapter
    About the Speaker:
    Distinguished MTS at Verizon Laboratories, Waltham, Massachusetts.
    He works on various NGN projects related to delivering enhanced voice, data, and video services to business and residential customers.
    Worked in Bell-Northern Research (BNR) Ltd. designing, implementing, and leading implementation of trunking and traffic management software modules for Passport® multi-service switch.
    Authored/co-authored more than 150 patents, books, chapters, technical reports, Industry Standards contributions, and articles for various international archival journals, magazines, and referenced conference proceedings.
    His recent book entitled, “Implementing Voice over IP” [ISBN: 0-471-21666-6] is currently in second printing.
    He co-edited “Multimedia Communications Networks: Technologies and Services” [ISBN-10: 0890069360, ISBN-13: 978-0890069363].
    He is also a member of the Board of Editors of the Journal of Network and Systems Management
    He is an adjunct faculty member of Brandeis University and Bentley College.

    Tuesday, 6th July,2010, 1500hrs
    “Research Trajectories of Microsystems for Health-Care and Environmental Sensing”
    Professor Yogesh B. Gianchandani, Deputy Director, Center for Wireless Integrated Microsystems (WIMS), University of Michigan, USA
    Venue: GG Conference Room, GG Building Second Floor, EE Department (opposite EE office), IIT Bombay
    Jointly with IEEE AP/ED Bombay Chapter
    Abstract: In just a few decades, microsystems and related technologies have changed the way that we live – how we work and communicate; the food and medicine that we consume; the clothing that we use; and the entertainment that we seek. This presentation will review selected research efforts in microsystems that utilize microelectromechanical components, and explore the opportunities and challenges that lie ahead. Health-care and environmental sensing applications are of particular interest as technology drivers. For example, research in implantable medical microsystems is directed at neural, retinal and cochlear prostheses, drug delivery devices, and smart stents. In the domain of environmental sensing, there has been an impetus to miniaturize gas chromatography, stimulating research in separation columns, gas pumps, valves, and detectors. Radiation detectors are also of significant interest, as are sensors for harsh environments, such as those encountered in petroleum reservoirs. Taken together, these applications drive basic research in sensing, stimulation, signal conditioning, communication methods, packaging, and power management. As we move forward, a systems perspective can help to keep the research focused, accelerating and amplifying the societal gain with available resources. However, practical and affordable solutions at the system level will require partnerships between specialists, and also between academia and industry.
    About the Speaker: Professor Yogesh B. Gianchandani serves as the deputy director for the Center for Wireless Integrated Microsystems (WIMS) at the University of Michigan. He has published more than 200 papers in microsystems-related conferences and journals and has more than 30 patents issued or pending. From 2007 to 2009, he served at the National Science Foundation, as the program director for Micro and Nano Systems within the Electrical, Communication, and Cyber Systems (ECCS) Division. Dr. Gianchandani was a Chief Co-Editor of Comprehensive Microsystems: Fundamentals, Technology, and Applications, published in 2008, and served as a General Co-Chair for the IEEE/ASME International Conference on Micro Electro Mechanical Systems (MEMS) in 2002. Dr. Gianchandani is a Fellow of IEEE.

    Saturday 5th June 2010, 1000-1115hrs , 1145-1300 hrs
    Venue: Aerospace Engineering Department , IIT Bombay
    Sunday 6th June 2010, 1000-1300 hrs
    Venue: University Auditorium, Indore
    Monday 7th June 2010, 1100-1215hrs , 1225-1330 hrs
    Venue: First Floor Conference Hall, Main Building ,Pune Vidyarthi Griha’s College of Engineering and Technology , Pune
    Talk # 1 – “Inertial System and GPS Technology Trends”
    Talk # 2 – “Inertial Navigation System and Global Positioning System Integration Architectures and Performance Comparisons”
    by Dr. George T. Schmidt, Distinguished Lecturer for the IEEE Aerospace and Electronic Systems Society, Lecturer, Massachusetts Institute of Technology, Lexington, MA-02421, USA – gtschmidt@alum.mit.edu
    Jointly with IEEE Pune and MP Subsections
    Abstract of Inertial System and GPS Technology Trends :
    This presentation presents a roadmap for the development of inertial sensors, the Global Positioning System (GPS), and integrated inertial navigation system (INS)/GPS technology. This roadmap will lead to better than 1-m accuracy, low-cost, moving platform navigation in the near future. Such accuracy will enable military and civilian applications which were previously unthought-of a few years ago. After a historical perspective, a vision of the inertial sensor instrument field and inertial systems for the future is given. Accuracy and other planned improvements for GPS are explained. The trend from loosely-coupled to tightly-coupled INS/GPS systems to deeply-integrated INS/GPS is described, and the synergistic benefits are explored. Some examples of the effects of GPS interference and jamming are illustrated. Expected technology improvements to system robustness are also described. Applications that will be made possible by this new technology include personal navigation systems, robotic navigation, and autonomous systems with unprecedented low-cost and accuracy.
    Abstract of Inertial Navigation System and Global Positioning System Integration Architectures and Performance Comparisons :
    An inertial navigation system (INS) exhibits relatively low noise from second to second, but position errors increase with time. In contrast, Global Positioning System (GPS) position errors are relatively noisy from second to second, but exhibit no long-term growth. Using both of these systems together is superior to using either alone. Integrating the information from both sensors results in a navigation system that operates like a drift-free INS. Further benefits can be gained depending on how the information is combined. This presentation will focus on integration architectures including loosely-coupled, tightly-coupled, and deeply-integrated configurations. The advantages and disadvantages of each level of integration will be identified. Examples of current and future systems will be cited. Simulation comparisons between the three architectures will be explained in order to understand the advantages of each. The loosely-coupled and tightly-coupled systems will be compared in several scenarios including aircraft flying against jammers and a helicopter flying a scout mission. The tightly- coupled and deep-integration architectures will be compared for a precision guided munition operating in several different jamming scenarios.
    About the Speaker:
    George T. Schmidt is a Distinguished Lecturer for the Institute of Electrical and Electronic Engineers (IEEE) Aerospace and Electronic Systems Society. He is Editor-in-Chief of the American Institute of Aeronautics and Astronautics (AIAA) Journal of Guidance, Control, and Dynamics. He is also a Lecturer in Aeronautics and Astronautics at the Massachusetts Institute of technology (MIT) and an industry consultant in guidance, navigation, and control. He is currently Director of the NATO Research and Technology Agency (RTO) Lecture Series on Low Cost Navigation Sensors and Integration Technology. He is an AIAA Fellow, an IEEE Life Fellow, and he is an elected member of the Russian Federation, Academy of Navigation and Motion Control. In 2007, he retired as the Director of Education at the Charles Stark Draper Laboratory, Cambridge, Massachusetts. Prior to that position, he was the Leader of the Guidance and Navigation Division and Director of the Draper Guidance Technology Center. His major technical activities have been in control system design for missiles, aircraft, and manned spacecraft; Kalman filtering applications; and integration techniques for high-resolution synthetic aperture radars, satellite navigation systems, and inertial sensors. He has served the NATO RTO (formerly AGARD) in many positions since 1968, including as a U.S. member of the Guidance and Control Panel. He has received several awards including the AIAA International Cooperation Award in 2001 and the NATO RTO highest technical award, the von Kármán Medal in 2005. He is author or contributing author of more than 80 technical papers, reports, encyclopedia articles, and books. He received his S.B. and S.M. degrees in Aeronautics and Astronautics from MIT and his Sc.D. in Instrumentation from MIT.

    Monday 17th May 2010,1800 hrs
    42nd World Telecommunication and Information Society Day
    Invited Talks on this year’s ITU theme “Better city, better Life with ICTs”
    Chief Guest and Speaker: Shri V K Mahendra, PGM BSNL, Pune Telecom
    Venue: Firodia Hall, Institution of Engineers (I), Shivajinagar, Pune
    Jointly with IETE Pune Centre, IEEE ComSoc Bombay Chapter
    About the Speaker: Vinod Kumar Mahendra did his BE.(Electronics & Communication) from IIT Roorkee in 1975 and Post-Graduate Diploma from IIT Delhi in 1976. After joining Indian Telecom Service he had worked in various capacities in Planning, Installation, Operation & Maintenance of various Telecom System. Prior to his posting as Principal General Manager(PGM) in Pune Telecom, he had worked as PGM in Patna for 1½ years, Sr.Deputy Director General in Information Technology for five years in New Delhi, Area Manager Telecom in Darjeeling (West Bengal) for four years, at Advanced Level Telecom Training Centre in Ghaziabad for four years, and at Ahmedabad Telephones for seven years. He had also worked as Asia Pacific Expert in Local Network at Bangkok, Inter-nation Telecom Union Expert in Ghana and Gambia. He had the opportunity to be on United Nations Development Programme (UNDP) fellowship in Telecom in London. While working in Delhi, he had attended many conference in Bangkok, Japan and US in the field of Information and Communication Technology, and had been associated with two ITU study Groups in Geneva, Switzerland.
    While working in BSNL HQ in Delhi, he had played a pivotal role in drafting the specification for CDR (Call Data Record) based Customer Care and Convergent Billing System. The Project Cost is $ 200 million and is under implementation at four stations with a planned Disaster Recovery System and 630 Terabyte Storage Area Network (SAN) System. Inter Operator Billing & Accounting System (IOBAS) was another project successfully implemented in 2005. He had also drafted the specification of Enterprises Resource Planning (ERP) System with ten thousand users.

    March 13-14, 2010
    THINKQUEST-2010 International Conference on Contours of Computing Technology
    In association with Springer Publications, Siemens, PCS Technologies
    Thursday, 14th January, 2010, 1100 hrs
    “Energy crisis and Thin film Photovoltaics: Research Status and Research Needs?”
    by Prof. Vikram Dalal, Distinguished Lecturer of EDS and Fellow, IEEE.
    Whitney Professor of Electrical and Computer Engr, Iowa State University, Ames, Iowa, USA
    Venue: Seminar Room 105, EE Department, IIT Bombay, Powai, Mumbai
    Jointly with AP/ED Chapter
    About the Speaker: Prof. Vikram J. Dalal obtained his BE from Bombay University and his Ph.D. from Princeton University. He worked for several companies including RCA Labs, Polaroid Corp and Chronar Corp, before joining Iowa State University. He is currently the Whitney Professor of Electrical and Computer Engineering there. His research interests have included organic semiconductors, photovoltaic devices, nanocrystalline and amorphous semiconducting materials, and thin film transistors. Prof. Dalal is a Fellow of IEEE and a Distinguished Lecturer of IEEE EDS.

    Thursday January 7, 2010 ,16:00 hrs
    ‘Telecom in India – Perspective And Opportunities’
    by Dr Suresh Borkar, Illunois Institute of Technology, USA
    Venue: Cummins College of Engineering, Karvenagar, Pune-52
    Jointly with IEEE Pune Sub-section, IEEE I&M Society Bombay Chapter
    December 16-18, 2009
    Second International Conference on Emerging Trends in Engineering & Technology (ICETET-09)
    Venue: G.H.Raisoni College of Engineering, Nagpur, India
    Jointly with KES Center Australia and MIR Labs, IEEE SMCS Bombay Chapter
    “Annual General Body Meeting”… Notice…Saturday 12th December 2009
    Slate given by Nominations Committee
    Draft Minutes of last AGM
    Secretary Report

    Saturday, 5th December,2009 9:30 to 16:30
    “Innovation: A perspective for engineering Pune’s future via Education, Employability, Entrepreneurship & Environment”
    Venue: Hotel Deccan Rendezvous (Apte Road), Pune
    Jointly with IEEE Pune Sub-section
    Tuesday-Thursday, 10-12 November, 2009
    2009 IEEE International Conference on Vehicular Electronics and Safety (ICVES-2009) ,Pune, India
    Call for Papers
    Sponsored by IEEE Intelligent Transportation Systems Society

    Fri-Sat, 30-31st October, 2009
    “National Conference on New Generation Wireless Communication Technologies”
    “Brochure and Call for Papers
    Venue: Centre for Technology & Engineering Applications, (C-TEA), L&T, Mumbai.
    Organized by: IEEE Communications Society (Bombay & India Council Chapter) and L&T Institute of Technology, in association with IETE Mumbai Centre

    Friday 25th September 2009, 9:30am to 5:30pm
    “IEEE Digital Security Seminar”
    Venue: ITC Grand Central,Parel, Mumbai 400012
    “Report on IEEE Digital Security Seminar”
    Saturday 12th September 2009,
    “Year 2009 Prof K Shankar Student Paper and Project Contest”
    Venue: Fr. Conceicao Rodrigues College of Engineering, Bandra West, Mumbai
    The last date for Submitting the Papers and Project : Friday 1st September 2009
    “STUDENTS AWARENESS CONTEST 2009 for Students of Engineering and Science Colleges Registration July 24,2009”
    “Brochure – STUDENTS AWARENESS CONTEST 2009
    Organized by: IEEE IAS/PES Bombay Chapter, IEEE Pune Subsection and IEEE Student Branch International Institute of Information Technology (I2IT), Pune

    Friday, 10 July,2009, 1100hrs
    “Can You Win The Nobel Prize: You Certainly Can”
    by Prof. Rob Riley Ed.D., Secretary, IEEE Education Society Chair, Chapters Committee, IEEE Education Society
    Venue: KReSIT Seminar Hall , IIT Bombay
    Jointly with IEEE Education Society Chapter
    Abstract: I met and have interacted with a number of Nobel laureates who are at MIT. I wondered how they were different from other people, I wondered how I could be like them, I wondered if I could even attempt to be like them. I hope to win a Nobel Prize one day, that is a goal of mine, it’s not very realistic; but I strive for that. I would like to share with you some of the traits of the Nobel laureates that I have met.
    About the Speaker: Prof.Rob Reilly received a Bachelors degree from the University of Massachusetts at Amherst (USA) in 1974, the Master’s degree from Springfield College (Massachusetts USA) in 1976, and a Doctoral degree from the University of Massachusetts at Amherst (USA) in 1997.
    Dr. Reilly has served as a Post Doctoral Research Associate in the Office of Information Technologies at the University of Massachusetts at Amherst for 2 years, where his research dealt with the formulation of university wide policy for the integration and application of technology. Most recently he served 6 years as a Visiting Scientist at the Media Laboratory at the Massachusetts Institute of Technology (MIT).
    In the IEEE Education Society (EdSoc), Dr. Reilly currently serves the Society Secretary, is the Chair of the Chapters Committee, the Editor of News&Notes, which is the Society’s newsletter; the Editor of The Interface, which is a publication of the EdSoc and the ECE Division of the American Society for Engineering Education. He has been the Guest Editor of two recent issues of the IEEE Transactions on Education.
    Dr. Reilly has received 2 large US National Science Foundation grants to perform research into teaching and learning models and educational pedagogy.

    Friday,12th June, 2009, 1500 hrs
    “Software Defined Radio – Issues And Architecture Design ”
    by Prof D. R. Vaman, Texas Instrument Endowed Chair Professor, & Director of ARO Center for Battlefield Communications (CeBCom) Research Electrical and Computer Engineering Department, Prairie View A&M University
    Venue: KReSIT Seminar Hall , IIT Bombay
    Jointly with IEEE Communications Society Chapter
    Note: Available on Webcast and remotely through Edusat “www.cdeep.iitb.ac.in”
    Abstract: This presentation includes a brief overview of the research activities of ARO CeBCom and focuses on issues and architecture of Software Defined Radio (SDR) for secure tactical applications. The use of SDR allows flexibility in usage of the same radio with automatic reconfigurability in different environments. Also, it facilitates dynamic changes to the modulations and symbol constellations to ensure recovery of data in different channel conditions. This presentation identifies challenges in the design of SDR as imposed by different tactical applications to support QoS assured multi-service applications. Emphasis in SDR design is on power efficiency and distributed network management function that dynamically manages trusted software with cross layer functions for secure multi-service provisioning with multimode RF functionality. Finally, this presentation presents initial architecture of SDR that has been implemented with dynamic modulation; and Spectrum Sensing, Dynamic Channel Allocation and Switching of Channels, and Dynamic frequency switching during transmission.
    About the Speaker: Dhadesugoor R. Vaman is Texas Instrument Endowed Chair Professor and Founding Director of ARO Center for Battlefield Communications (CeBCom) Research, ECE Department, Prairie View A&M University (PVAMU). He has more than 37 years of research experience in telecommunications and networking area. Currently, he has been working on the control based mobile ad hoc and sensor networks with emphasis on achieving bandwidth efficiency using KV transform coding; integrated power control, scheduling and routing in cluster based network architecture; QoS assurance for multi-service applications; and efficient network management.
    Prior to joining PVAMU, Dr. Vaman was the CEO of Megaxess (now restructured as MXC) which developed a business ISP product to offer differentiated QoS assured multi-services with dynamic bandwidth management and successfully deployed in several ISPs. Prior to being a CEO, Dr. Vaman was a Professor of EECS and founding Director of Advanced Telecommunications Institute, Stevens Institute of Technology (1984-1998); Member, Technology Staff in COMSAT (Currently Lockheed Martin) Laboratories (1981-84) and Network Analysis Corporation (CONTEL) (1979-81); Research Associate in Communications Laboratory, The City College of New York (1974-79); and Systems Engineer in Space Applications Center (Indian Space Research Organization) (1971-1974). He was also the Chairman of IEEE 802.9 ISLAN Standards Committee and made numerous technical contributions and produced 4 standards. Dr. Vaman has published over 200 papers in journals and conferences; widely lectured nationally and internationally; has been a key note speaker in many IEEE and other conferences, and industry forums. He has received numerous awards and patents, and many of his innovations have been successfully transferred to industry for developing commercial products.

    Mon-Wed, 8-10 June,2009
    “National Level Workshop on Wavelets and Applications”
    Venue: Department of Electronics and Telecommunication Engineering,SGGS Institute of Engineering and Technology, Nanded (MS)
    Jointly with IEEE Signal Processing Bombay Chapter
    Mon-Tue, 1st-2nd June,2009
    “2nd International Workshop on Electron Devices and Semiconductor Technology (IEDST 2009)”
    Venue: IIT Bombay, Powai, Mumbai
    Jointly with IEEE ED Society, AP/ED Bombay Chapter and IIT Bombay
    Thursday, 21st May, 2009, 1700 hrs
    “Pattern Recognition Technologies to Enhance the Health, Security, and Quality of Life ”
    by : Prof. Rangachar Kasturi, Past President IEEE Computer Society Professor, Computer Science and Engineering, University of South Florida, Tampa, US.
    Venue: KReSIT Seminar Hall, IIT Bombay
    Jointly with Dept of Electrical Engg-IIT Bombay and Dept of Computer Science and Engg-IIT Bombay
    Abstract: Humans have outstanding abilities to interpret patterns in data captured by our senses. Current machines are notoriously inept in pattern recognition abilities leading to frustrations we all experience. The field of Pattern Recognition strives to enhance the abilities of machines to extract meaningful information from data through automated analysis. We have pattern recognition technologies in action when a checkout clerk scans the barcode on a product; a retinal scan authentication permits access to a secure facility; a fingerprint database identifies a criminal suspect; a convicted criminal is released after DNA evidence clears him/her of the crime; a fragile historic document becomes a searchable file in a digital library; a brain tumor’s precise location is computed to aid the physician’s decision; and the potential paths of hurricanes are estimated. Such innovations have had a profound impact for over fifty years on the quality of life of citizens of the world and have resulted in products and services in the information technology, security, and health-care industries. Yet we have barely scratched the surface of the potential of these innovative applications and economic opportunities that pattern recognition systems are poised to deliver in the next few decades. For example, there are no systems today to automatically search and retrieve that special picture or that video clip based on your description of what you are looking for; face recognition systems perform poorly when presented with images taken with different lighting conditions; human operators are still tasked with monitoring for that rare suspicious activity by staring at a wall of monitors fed by many surveillance cameras, and specific sets of genes which contribute to increased risk for cancer remain unknown. We present an overview of the state of the art of pattern recognition technologies and briefly describe the research challenges and opportunities presented by this exciting discipline.

    Tuesday, 19 May,2009
    “One Day Workshop on MSP430 Microcontroller (Texas Instruments)”
    Venue: Department of Electronics and Telecommunication Engineering,SGGS Institute of Engineering and Technology, Nanded (MS)
    Jointly with IEEE Signal Processing Bombay Chapter, Vishwakarma Institute of Technology, Pune Department of Electronics Engineering and Cranes Software International Limited
    Sunday 14th May 2009, 1000-1300 hrs
    41st World Telecommunication and Information Society Day
    Invited Talks on this year’s ITU theme “Protecting Children in Cyberspace”
    Chief Guest: Shri J Gopal, ED, MTNL Mumbai
    Speakers: Shri .Vijay Mukhi, Shri I M Zahid – ACP Goregaon West Division, & Shri M S Thomas, Station Engineer, Doordarshan
    Venue: All India Radio Auditorium, Near Mantralaya, Mumbai – 400 032
    Jointly with IETE Mumbai Centre, IET Mumbai Network,BESI Mumbai Chapter, IEEE AES/COM/LEOS Chapter
    Wednesday 13th May 2009
    125th anniversary of the IEEE- Chairman Message
    Thursday, 19th March, 2009, 1500 hrs
    “Quantum Cascade Lasers – Distributed Feedback Lasers and Arrays for Chemical Sensing”
    by : Dr. Benjamin Lee, Applied Physics, Harvard University
    Venue: Nanoelectronics Conference Room, 3rd Floor, EE Annex Building, IIT Bombay
    Jointly with AP/ED Chapter
    Abstract: Quantum cascade lasers (QCLs) are unipolar semiconductor lasers based on intersubband transitions in heterostructures. The emission wavelengths of mid-infrared QCLs span from 3 to 24 microns and cover the “fingerprint” region of molecular absorption. This makes QCLs particularly interesting for spectroscopic applications. I will discuss the development of arrays of distributed-feedback QCLs as widely-tunable, single-mode laser sources, and demonstrate their applications to chemical sensing. The potential for high-resolution spectroscopy, spectroscopy of dense media, and remote sensing are explored.
    About the Speaker: Benjamin Lee is a native of Toronto, Canada. He received the B. S. degree in Applied Physics from Caltech in 2002. He recently finished a Ph.D. degree in Applied Physics, in the School of Engineering and Applied Sciences at Harvard University. He did his thesis under the supervision of Prof. Federico Capasso, on the topic of quantum cascade lasers – distributed feedback devices and applications in chemical sensing. His research interests include the development of novel quantum cascade laser devices for spectroscopy and chemical sensing, optoelectronics for solar energy harvesting, microfabrication and nanotechnology.

    Saturday 21st Feb 2009
    Second Job Fair by IEEE Bombay Section on Saturday 21st Feb 2009
    Venue: SPIT (Sardar Patel Institute of Technology ), Andheri West, Mumbai
    Report on Second Job Fair
    Friday, 23rd January, 2009, 1630 hrs
    “Breakdown of Nanoscale CMOS Devices with TiN/High-k Gate Stacks”
    by : Professor Durga Misra, Electrical and Computer Engineering Department,New Jersey Institute of Technology, Newark, NJ 07102
    Venue: Nanoelectronics Conference Room, 3rd Floor, EE Annex Building, IIT Bombay
    Jointly with AP/ED Chapter
    Abstract: Stringent power requirements in the chips by the International Technology Roadmap for Semiconductors (ITRS) dictate replacement of silicon dioxide as it has already reached the direct tunneling regime. Therefore, for high speed and low power applications high-k dielectric materials are being integrated into standard CMOS technologies. At present, reliability requirements of advanced gate stacks with high-k dielectrics are of intensive research interests as these high-k dielectrics needs to meet the silicon dioxide standards. In this talk some of the inherent asymmetry on breakdown characteristics of interfacial layer (IL) and high-k layer in the overall gate stacks breakdown will be discussed. Gate stack’s response to many degradation mechanisms such as charge trapping and defect generation,soft breakdown, progressive breakdown and finally hard breakdown will be evaluated as a function of ILs, grown on various process conditions. Correlation of stress-induced leakage current (SILC) with the breakdown behavior will be outlined.
    About the Speaker: Dr. Durga Misra is a Professor in the Department of Electrical and Computer Engineering of New Jersey Institute of Technology (NJIT). He received his M.S. and Ph.D. degrees both in Electrical Engineering from University of Waterloo, Waterloo, Canada in 1985 and 1988 respectively. He has been a faculty member since the fall of 1988 at NJIT. His current research focus is study of nanoscale CMOS gate stacks. He received several research awards from the National Science Foundation. In 1997 he worked at the VLSI Research Department at Bell Laboratories. He is currently a Distinguished Lecturer of Electron Device Society of IEEE and received IEEE Membership and Geographic Activities Board’s International Leadership Award. He has organized many International Symposiums on Solid-State Science and Technology field during the Technical Meetings of the Electrochemical Society and IEEE. Currently he serves as the EDS-SRC Chair for Regions 1-3 & 7 of IEEE. He is a Fellow of the Electrochemical Society (ECS) and is currently the Chair of Dielectric Science and Technology Division of ECS. He has co-edited several volumes on High-k gate stack ECS Transaction Series.

    Wednesday, 21st January 2009, 1515 hrs
    “Roadmap for 22nm Logic CMOS and Beyond”
    by : IEEE Distinguished Speaker: Prof. Hiroshi Iwai Professor,Frontier Research Center and Professor, Dept. of Electronics and Applied Physics, Interdisciplinary Graduate School of Science and Engg. Tokyo Institute of Technology, Yokohama, Japan
    Venue: Institute Auditorium, IIT Bombay
    Jointly with EDS Chapter
    Abstract: This is one of the lectures given in the IEDM 2008 Short Course, “22 nm CMOS Technology”, held on December 14, 2008 in San Francisco, USA. 22 nm CMOS logic technologies are expected to be introduced into market around 2011-12. At the beginning part of the talk, it is explained that the down-scaling is still the most important and effective way for achieving the progress of logic CMOS performance, regardless of its concern for the technological difficulties. Then, the changes from ITRS (International Technology Roadmap for Semiconductor) 2007 to 2008-Update (supposed to be published at the end of 2008 or beginning of 2009) are described. In fact, recent shrinking trend of the logic CMOS gate length has been very aggressive. However, predicted shrinking trend of the downsizing by the past ITRS’s was even further aggressive for the industry to catch up, and thus its future trend becomes less aggressive in the 2008-Update, resulting in the delay in the gate length shrinkage for 3 years in near future and even 5 years in the middle term. Corresponding to this, the pace of introduction of new technologies becomes slower. For example, introduction of Fin-FET or Double gate structure will be delayed with 4 years, and, of course, 22 nm CMOS can be made with the planer bulk CMOS. In other words, planar bulk CMOS will have a much longer life that expected by ITRS 2007.
    The increasing power consumption is the limiting factor of the logic CMOS,and lowering the supply voltage is the most effective way to decrease the dynamic power consumption. However, because of the significant increase of the sub threshold leakage current, the supply voltage cannot be scaled-down easily and it is supposed to stay above 0.85 V for next 10 years in ITRS 2008 Update. This kind of improper scaling with keeping higher supply voltage and thicker gate oxide thickness is the solution for the moment. In long term, technology development such as thinner gate oxide by new gate materials and suppression technique of the threshold voltage will succeed to lower the supply voltage. SRAM’s in the logic chip occupies a considerably large area as cachememories and the reduction of its cell area and the power consumption is > one of the most important issues for the down-scaling of logic CMOS. Decreasing the gate length and power supply voltage for the SRAM cell causes degrades the cell operation stability and standby leakage current, resulting in the down-scaling of SRAM cell difficult. Fortunately, however, various techniques in process, device and circuit have made the successful down-scaling of SRAM cells down to 22 nm in experimental fabrication.
    Final part of the talk, long term roadmap for logic CMOS is described. It is expected that the logic CMOS will encounter its downsizing limit sometime in 2020-2030 around the gate length of 5 nm presumably due to the increase in the sub threshold leakage current. Two candidates has recently recognized as the emerging device technologies which could replace current planer bulk CMOS. They are the Si-nanowire FET and the alternative channel (such as GaAs and Ge) FET. They are quite different from the current CMOS devices and interesting features of them are introduced focusing on Si-nanowire, in addition with their technology roadmap. Also, long term roadmap speculation towards 2050 and beyond will be briefly mentioned.
    About the Speaker: Hiroshi Iwai received the B.E. and Ph.D. degrees in electrical engineering from the University of Tokyo and worked in the research and development of integrated circuit technology for more than 25 years in Toshiba. He is now a professor of Frontier Collaborative Research Center and Dept. of Electronics and Applied Physics, Interdisciplinary Graduate School of Science and Engineering, Tokyo Institute of Technology, Yokohama, Japan.
    Since joining Toshiba, he has developed several generations of high density static RAM’s, dynamic RAM’s and logic LSI’s including CMOS, bipolar, and Bi-CMOS devices. He has also been engaged in research on device physics, process technologies, and T-CAD related to small-geometry MOSFETs and high speed bipolar transistors. He has authored and coauthored more than 600 papers in conferences and journals.
    He has served on many committees of conferences and editors of journals, as well as a member of many evaluation committee of public organizations. For example, the President of the IEEE EDS, an elected member of the IEEE EDS AdCom, an editor of IEEE EDS Newsletter, a guest editor of IEEE Trans. on Electron Devices, and an editor of the Proceedings of ECS Symp. on ULSI Process Integration. He is now the Sr. Past President of the IEEE EDS and the Div I Director Elect of the IEEE. He served as also a consultant and concurrent professors of Huazhong University of Science, Lanzhou Jaotong University, Xinjang University, Xiantan University, China and D. J. Gandhi Distinguished Visiting Professor, Indian Institute Technology, Bombay.
    His awards include Local Commendation for Invention from Japan Institute of Invention and Innovation (1990, 2005), Grand Prize of Nikkei BP Technology Awards (1994), IEEE EDS Paul Rappaport Award (1994), IEICE ES Electronics Award (1998), IEEE EDS J.J.Ebers Award (2001), and JSAP Award for the best paper (2002), IEEE BCTM Award (2007), Yamazaki Teiichi Prize (2007), IEEE EDS Distinguished Service Award (2008).
    His current research interests are Nano CMOS and Emerging Technologies: High-k gate insulator, Si Nanowire MOSFETs, CNT FETs, plasma doping for ultra-shallow junctions, Ni salicide, RF CMOS modeling, and Ge transistors.
    Dr. Iwai is, a Fellow of IEEE, a member of Electrochemical Society, a Fellow of the Japan Society Applied Physics, a member of the Institute of Electronics, Information and Communication Engineers of Japan, and a member of the Institute of Electrical Engineers of Japan. He is also Distinguished Lecturer of IEEE ED Society.

    Wednesday, 21st January 2009, 1400 hrs
    “Energy Crisis and Role of Solar Energy Conversion”
    by : IEEE Distinguished Speaker: Prof. Vikram Dalal Director of MRC Thomas Whitney Professor of Electrical and Computer Engg , Iowa State University, Ames, Iowa, USA
    Venue: Institute Auditorium, IIT Bombay
    Jointly with EDS Chapter
    Abstract: It is very clear from the geological data that the world is running out of easy to extract fossil fuel based resources. The life of traditional, easy to extract fossil fuel resources is measured in decades, not centuries. In this talk, I will examine the status of the world’s fossil fuel resources, and show how the rapid increase in energy consumption in China and India is likely to lead to a rapid depletion of resources such as coal and Uranium. Even shale oil and heavy bituminous oil will only last an additional fifty years or so. Therefore, it is imperative that mankind move away from dependence on fossil fuel resources and explore alternative energy technologies. The talk will emphasize the need for energy conservation and explore the status and economics of various solar energy technologies to allow us to transition away from the era of fossil fuels. Particular attention will be paid to the energy strategies for India.
    About the Speaker: Professor Vikram Dalal specializes in energy resources and solar photovoltaic energy conversion. He is Whitney Professor of Electrical and Computer Engineering at Iowa State University in the U.S. He obtained his B.E.(Elec.) degree from VJTI in 1964 and his Ph.D. in EE from Princeton University in the U.S. in 1969. He is a Distinguished Lecturer of IEEE and a Fellow of IEEE.

    Thursday, 15th January, 2009, 1530 hrs
    “Research Challenges in Cognitive Radio Networks”
    by : Vijay K. Bhargava Professor & Head Department of Electrical and Computer Engineering University of British Columbia
    Venue: EE Seminar Hall, IIT Bombay
    Jointly with ComSoc Chapter
    Abstract: he cognitive radio technology will allow a group of potential users to identify and access available spectrum resources provided that the interference to users for whom the band has been licensed is kept below a prescribed level. This research area is at an early stage because various research challenges have to be addressed and solved. In this talk we present an overview of some research issues for cognitive radio networks. Specifically, we present research and developments in cognitive radio networks with focus on: i) spectrum sensing, ii) link adaptation, iii) advanced transceiver design, and iv) admission control. We discuss research problems related to these specific topics that need to be addressed before deployment of cognitive radio systems.
    About the Speaker: Vijay K. Bhargava received his B.Sc., M.Sc. and Ph.D. degrees from Queen’s University, Kingston, Ontario in 1970, 1972 and 1974 respectively. Vijay has held regular/visiting appointments at the Indian Institute of Science, University of Waterloo, Concordia University, Ecole Polytechnique de Montreal, UNIDO, NTT Wireless Communications Labs, Tokyo Institute of Technology, University of Indonesia, the Hong Kong University of Science and Technology, The Hong Kong University and the University of Victoria. Currently he is a professor and Head of the Department of Electrical and Computer Engineering at the University of British Columbia.
    Vijay served as the Founder and President of “Binary Communications Inc.” (1983-2000). He has provided consulting services to several companies and government agencies. He is a co-author (with D. Haccoun, R. Matyas and P. Nuspl) of “Digital Communications by Satellite” (New York: Wiley 1981), a co-editor (with S. Wicker) of “Reed Solomon Codes and their Applications” (IEEE Press 1994) and a co-editor (with V. Poor, V. Tarokh and S. Yoon) of “Communications, Information and Network Security” (Kluwer: 2003) and a co-editor (with E. Hossain) of Cognitive Wireless Communications Networks(Springer: 2007). He has served as Editor for the IEEE Transactions on Wireless Communications and the IEEE Transactions on Communications. In January 2007, he was appointed Editor-in-Chief of the IEEE Transactions on Wireless Communications.
    A Fellow of the IEEE, the Engineering Institute of Canada (EIC), the Royal Society of Canada, and the Canadian Academy of Engineering, Vijay has been honoured many times by his colleagues and has received numerous awards. Vijay is very active in the IEEE and has served as the President of the Information Theory Society, Vice President for Regional Activities Board, Director of Region 7, Montreal Section Chair and Victoria Section Chair. He is a past member of the Board of Governors of the IEEE Communications Society and the IEEE Information Theory Society. He was nominated by the IEEE BoD as a candidate for the office of President-Elect in 1996, 2002 and 2003. His current research interest is adaptive wireless access systemdesign for cognitive radio networks.

    Tuesday, 13t January 2009, 1500 hrs
    “Micromechanical Approaches to Molecular Recognition”
    by : Thomas Thundat, Ph.D., Oak Ridge National Lab, USA Leader, Nanoscale Science and Devices Group & Research Professor, Department of Physics Research Professor, Department of Electrical Engineering University of Tennessee, Knoxville
    Venue: Nanoelectronics Conference Room, 3rd Floor, EE Annex Building, IIT Bombay
    Jointly with AP/ED Chapter
    About the Speaker: Thomas G.Thundat did his B.Sc. in Physics (major) from University of Kerala (1978), M.Sc. in Physics from IIT Madras (1980).He received hid PhD from State University of New York at Albany (1987).His dissertation title was: “Structural Investigations of Chemically and Electrochemically Deposited Metals on Si and Ge surfaces”.
    University Experience Research Professor (2001-present), Department of Physics Astronomy, University of Tennessee Visiting Professor (1996 ­ present); University of Bourgundy, Dijon, France Faculty Research Associate (1987 -1990); Physics Department; ASU, Tempe, Arizona
    Professional Experience: Distinguished Scientist, ORNL(2002) Senior Scientist, Life Sciences Division, ORNL (1999 -2001). Group Leader, Nanoscale Science and devices Group, Life Science Division (1998 – present). Research Staff Member. Health Sciences Research Division, Chemical and Biological Physics Section, ORNL, Oak Ridge, Tennessee (1992 -1995)
    Significant Career Accomplishments Discovered sensitive technique of detecting adsorption-induced surface stress and pioneered the development of a novel class of physical, chemical, and biological sensors based on adsorption-induced force (1991- present) Developed scanning probe techniques for biological imaging (1987-1993) Developed x-ray standing wave techniques for analyzing electrochemical interfaces (1985-1987)
    He is also a member of various professional bodies as well as is in scientific advisory board of various organizations. He has received numerous awards throughout his illustrious professional career. He was chosen as the ORNL Inventor of the Year in 2000.He has vast research experience in Micromechanical sensors (MEMS), Scanning Probe Microscopy, X-ray Standing Waves, XPS, Ion-channeling, Rutherford Backscattering, Electrochemistry and photo electro-chemistry, Physics and Chemistry of Surfaces; Biophysics, Quantum confinement, Nanosystems and Nanotechnology. He has over130 publications in refereed journals, 5 book chapters with 11 issued patents and 7 patents are still pending.

    Fri-Sat, 9-10th January,2009
    “National Conference on Wireless Communications and Networking”
    by : L&T Institute of Technology
    Venue: Centre for Technology & Engineering Applications, Powai, Mumbai
    Jointly with IETE

    Tuesday, 23rd December, 2008, 1130 hrs
    “The High-K/Metal Gate Technology”
    by : Dr. Mukesh V. Khare, Ph.D. , IBM , USA
    Venue: Nano Conference Room, IIT Bombay
    Jointly with AP/ED Chapter
    Abstract: This talk discusses the ever growing challenges of semiconductor technology and IBMs leadership in driving the collaborative research to deliver innovative solutions. The high-k/metal gate technology developed using IBMs collaborative innovation model is presented here.
    About the Speaker: Mukesh Khare received the M.Tech. degree from the Indian Institute of TechnologyBombay, India in 1994 and the M.S., M. Phil., and Ph.D. degrees from Yale University, New Haven, Connecticut, USA, in 1995, 1997, and 1999 respectively. He joined the IBM Semiconductor Research and Development Center (SRDC), Hopewell Junction, NY, in 1998 and has been actively perusing research and development in CMOS technology at various positions. He led the engineering team towards development and qualification of the 90nm SOI technology all the way from the basic definition to the transfer in 300mm manufacturing Fab and volume production. Dr. Khare managed the second generation 65nm and the 45nm SOI device design department at IBM. He was the senior manager leading 32nm Silicon Technology Research at IBM’s Watson Research Center. Dr. Khare is now the project manager leading introduction and volume production of High-K/Metal Gate technology in 300mm Fab at IBM. He has authored and co-authored more than 40 research papers of which 18 papers were presented at the IEDM and VLSI technology conferences. Dr. Khares research interest include development of advanced devices and structures for CMOS technology, process integration for integrated circuits, SRAM and device reliability for acceptable minimum and maximum operating voltage, gate dielectric development and technology/design interaction.

    Thursday, 18th December, 2008, 1600 hrs
    “Solid-State Lighting and Water Purification”
    by : Prof Colin Humphreys,Department of Materials Science and Metallurgy, University of Cambridge, Cambridge, UK
    Venue: GG Conference Room,2nd Floor,GG Building,Department of Electrical Engg., IIT Bombay
    Jointly with AP/ED Chapter
    Abstract: Electricity generation is the main source of energy-related greenhouse gas emissions and globally lighting uses one-fifth of its output. Solid-state lighting using white GaN-based LEDs will reduce this figure by at least 50%. LED lighting will provide reductions of 10-15% in fuel consumption and carbon dioxide emissions from power stations in the next 5-10 years. GaN-based LED lighting will probably become the dominant form of lighting throughout the world, being ultra-efficient, ultra long-life, mercury free, inexpensive, tunable for mood-lighting, and providing natural lighting similar to sunlight for our health and well being. Because GaN-based LEDs can operate using 4V DC, they are ideal to be powered by solar cells and batteries. Hence villages not connected to an electricity grid can have lighting from a solar cell/battery/LED combination. AlGaN-based LEDs, emitting in the deep-UV, have the potential to destroy bacteria, viruses, mosquito larvae, etc, and hence to purify drinking water without adding chemicals. More people in the world will probably die this century from a lack of drinkable water than from global warming or from AIDS. GaN-based LEDs therefore have the potential to help solve a number of major problems facing our world. This talk will report the latest developments in this exciting field.

      1. Mon-Wed, 15th-17th Decemeber, 2008
        “IEEE Advanced Networks and Telecommunication Systems (ANTS) conference focussing on Telecommunications”

        • Programme

        Venue:F C Kohli Auditorium , IIT Bombay
        Jointly with IEEE ComSoc Chapter

      1. Monday, 15th December, 2008,
        “Internet 3.0: The Next Generation Internet Architecture”
        by : Raj Jain, Ph.D., Fellow of IEEE, Fellow of ACM, Professor of Computer Science and Engineering, Washington University in St. Louis,MO 63130, USA
        Venue: SPIT (Sardar Patel Institute of Technology ), Andheri West
        Jointly with ComSoc Chapter

        About the Speaker: Raj Jain, Ph.D., Fellow of IEEE, Fellow of ACM
        Professor of Computer Science and Engineering
        Washington University in St. Louis
        Campus Box 1045, One Brookings Drive
        St. Louis, MO 63130
        Phone:  +1 314 322 8092
        Email: Jain@cse.wustl.edu
        URL: http://www.cse.wustl.edu/~jain
        Author of: “High Performance TCP/IP Networking” and
        “The Art of Computer Systems Performance Analysis”

      2. Sunday, 14th December, 2008, 1000 hrs
        “Distinguished lecture on Distributed Intelligence and view of the IEEE and its Division X”
        by : Dr. William Gruver, FIEEE, Past President SMCS and Director Division X of the IEEE
        Venue: SPIT (Sardar Patel Institute of Technology ), Andheri West
        Jointly with SMCS Chapter

        Abstract: Abstracts of Dr. Gruver’s biography and his distinguished lecture can be found at     http://www.ieeesmc.org/lecturer/index.html

      3. Saturday, 13th December, 2008, 1900 hrs
        “Dr Gruver presentation on IEEE DivX”
        by : Dr. William Gruver, FIEEE, Past President SMCS and Director Division X of the IEEE
        Venue: Yacht Club , Colaba , Mumbai 400005
        Jointly with SMCS Chapter

        Abstract: Abstracts of Dr. Gruver’s biography and his distinguished lecture can be found at     http://www.ieeesmc.org/lecturer/index.html

      4. “Annual General Body Meeting”… Notice…Saturday 13th December 2008
      1. Monday, 8th December, 2008, 1430 hrs
        “MANET & Sensor Network Architectures”
        by : Dr Dhadesugoor R Vaman, PVAM University, Texas, USA
        Venue:Lecture Hall 1, 4th floor, MMS, Agnel Technical Education Complex Sector 9A, Vashi, Navi Mumbai – 400 703
        Jointly with ComSoc Chapter and IETE

        About the Speaker: Dhadesugoor R. Vaman is Texas Instrument Endowed Chair Professor and Founding Director of ARO Center for Battlefield Communications (CeBCom) Research, ECE Department, Prairie View A & M University (PVAMU). He has more than 38 years of research experience in telecommunications and networking area. Currently, he has been working on the control based mobile ad hoc and sensor networks with emphasis on achieving bandwidth efficiency using KV transform coding and cognitive radio principles; integrated power control, scheduling and routing in cluster based network architecture; QoS assurance for multi-service applications; and integrated power and efficient network management. Most of his research in the last 5 years has been directed towards Army Battlefield Capability Enhancements for Near Line of Sight/Beyond Line of Sight (BLOS/NLOS) Lethality.
        Prior to joining PVAMU, Dr. Vaman was the CEO of Megaxess (now restructured as MXC) which developed a business ISP product to offer differentiated QoS assured multi-services with dynamic bandwidth management and successfully deployed in several ISPs. Dr. Vaman raised the company valuation to $180 Million in 2000. Prior to being a CEO, Dr. Vaman was a Professor of EECS and founding Director of Advanced Telecommunications Institute, Stevens Institute of Technology (1984-1998); Member, Technology Staff in COMSAT (Currently Lockheed Martin) Laboratories (1981-84) and Network Analysis Corporation (CONTEL) (1979-81); Research Associate in Communications Laboratory, The City College of New York (1974-79); and Systems Engineer in Space Applications Center (Indian Space Research Organization) (1971-1974). He was also the Chairman of IEEE 802.9 ISLAN Standards Committee and made numerous technical contributions and produced 4 standards. Dr. Vaman has published over 200 papers in journals and conferences; widely lectured nationally and internationally; has been a key note speaker in many IEEE and other conferences, and industry forums. He has received numerous awards and patents, and many of his innovations have been successfully transferred to industry for developing commercial products.

      2. Thursday/Friday , 20th-21st November, 2008,
        “Workshop on Embeded System Design using PIC Microcontroller, Pune”
      1. Tuesday, 11th November, 2008, 1030 hrs
        “Low-frequency noise in advanced CMOS devices”
        by : Prof. Felice Crupi, University of Calabria, Rende, Italy
        Venue: Nanoelectronics Conference room (EE annex, third floor), IIT Powai
        Jointly with AP/ED Chapter and IIT Bombay

        Abstract: Low frequency noise (LFN) characterization is a powerful diagnostic tool for the investigation of material defectiveness and of the charge transport mechanisms in electronic devices. Starting from a brief introduction on the general properties of the noise in electronic devices, the talk addresses: i) the design of low-noise and high sensitivity instrumentation, ii) the modeling of LFN in the gate and the drain current, iii) the LFN characterization of advanced CMOS devices with alternative materials (high-k, metal gate, strained silicon, germanium substrate). In particular a novel model for 1/f noise in the gate current and its application for the evaluation of the gate stack quality in CMOS devices are presented.
        About the Speaker: Felice Crupi received the M.Sc. degree in electronic engineering from the University of Messina, Messina, Italy, in 1997 and the Ph.D. degree in electronic engineering from the University of Firenze, Firenze, Italy, in 2001. In 2002 he joined the University of Calabria, Rende, Italy, where he is currently Associate Professor of electronics. Since 1998 he was a repeat visiting scientist at the Interuniversity Micro-Electronics Center (IMEC), Leuven, Belgium, and in 2000 he was visiting scientist at the IBM Thomas J.Watson Research Center, Yorktown Heights, NY. His main research interests include reliability of CMOS devices, electrical characterization techniques for solid state electronic devices and the design of ultra-low noise electronic instrumentation. He has authored or coauthored about 100 publications in international scientific journals and in international conference proceedings.

      2. Friday, 7th November, 2008, 1500 hrs
        “Wireless in next generation networks”
        by : Dr. Madhusudan V.Pitke, Past Chair of IEEE Communications Society Chapter of Bombay Section and FIEEE
        Venue: 4th floor Main Conference Room of the ’11 High’Bldg, ONGC , Bandra-Sion Link Road, Mumbai 400017
        Jointly with Systems, Man & Cybernetics Society Chapter

      3. Thursday, 23rd October, 2008, 1000 hrs
        “New Opportunities in the Digital World”
        by : Rajesh Jain, Managing Director of Netcore Solutions Pvt Ltd, Mumbai
        Venue: SNDT Mini Auditorium, SNDT Women’s University, Juhu Campus, Santacruz( West), Mumbai
        Jointly with Communications Society Chapter and IETE Mumbai Centre

        Abstract: Discussing opportunities in the digital space in India — around broadband and mobile. There is a new world emerging with Teleputers, Ubinet and the M-Web creating the foundation for new platforms and services. It is an area India can lead the world in.
        About the Speaker: Rajesh Jain did his B. Tech. in Electrical Engineering from the Indian Institute of Technology, Bombay in 1988, and his M.S. in Electrical Engineering from Columbia University, New York in 1989. He worked at NYNEX Science and Technology for 2 years before returning to India in 1992.
        Rajesh launched IndiaWorld in 1995. From its pioneering start, IndiaWorld has grown to be one of the largest collection of India-centric websites, comprising Samachar, Khel, Khoj and Bawarchi. IndiaWorld was acquired by Satyam Infoway in November 1999 for US$ 100 million in one of Asia’s largest Internet deals.
        Rajesh’s current work and investments are focused around thin clients and mobiles as “teleputers”, service-based computing, multimedia/broadband/wireless world, two-way web, with emerging markets like India as first markets.
        Rajesh is Managing Director of Netcore Solutions Pvt Ltd, a software company, based in Mumbai, India. Netcore is working actively in the mobile media space in India. Rajesh has co-founded Novatium and Rajshri Media. He has also invested in 10 other cos. in the broadband and mobile space.
        Rajesh lives in Mumbai, India. His blog is at http://emergic.org

      4. Thursday, 16th October, 2008, 1600 hrs
        “Positioning in Wireless Networks and Monitoring Water Supply Distribution Systems using Wireless Sensor Networks”
        by : Dr. Seshan Srirangarajan, Research Fellow, Intelligent Systems Center,Nanyang Technological University,Singapore
        Venue: Conference Room, GG Bldg., 2nd floor, IIT Bombay
        Jointly with Communications Society Chapter and IIT Bombay

        Abstract: Ranging and positioning in wireless networks refers to the ability to determine positions of all nodes given some reference node positions and pairwise distance or range estimates between neighboring nodes. The prototype implementation of a directional beacon-based positioning algorithm using radio frequency signals is presented. Reference nodes equipped with rotational directional antenna allow the unlocalized node to compute its position. Synchronization between reference nodes and the unlocalized node is not required. Parameters, such as beam width and rotational speed of the directional antenna, are optimized in a low-cost solution, providing good position estimates.
        A distributed solution of the localization problem, based on second-order cone programming relaxation, will be presented next. This algorithm estimates node positions using only local information, independent of the range estimation technique. Simulation results, for uniform and irregular network topologies, illustrate computational efficiency and robustness to reference node position and distance estimation errors.
        Proposed Post-doctoral research at Nanyang Technological University (NTU): Develop generic wireless sensor network capabilities to enable real time monitoring of water distribution system. The project is aimed at three main applications: 1) Water conservation (through efficient control of pumping operations) based on integration of flow and pressure sensors with hydraulic models of the distribution system. 2) Integrated monitoring of hydraulic and water quality parameters. 3) Development of systems to enable remote detection of leaks and prediction of pipe burst events. The initial tasks will involve design and field installation of pressure and flow sensors and the integration of their data with hydraulic models of the system. The next phase of the project would involve node miniaturization, low power hardware, design of sensor interfaces, middleware for network management, exploring communication requirements, and applications for query processing and data management.
        About the Speaker: Seshan Srirangarajan received the BE degree from University of Mumbai in 2001, and the MS and PhD degrees from University of Minnesota in 2005 and 2008, respectively, all in Electrical Engineering. In 2005-06, he was an intern with the Wireless Technologies group at Honeywell Technology Center, Minneapolis, Minnesota. He will be joining Intelligent Systems Center at Nanyang Technological University, Singapore as a Research Fellow. His research interests include ranging and positioning in wireless networks, sensor networks and signal processing.

      5. Thursday, 2nd October, 2008, 1500 hrs
        “Electrostatic Protection for Semiconductor Electronics”
        by : Charvaka Duvvury, Texas Instruments
        Venue: Nano Conference Room, IIT Bombay
        Jointly with AP/ED Society Chapter and IIT Bombay

        Abstract: Electrostatic-Discharge (ESD) is a particular concern for electronic semiconductor chips used in consumer, medical and military applications. Most people do not realize that when touching a chip or connecting a USB cable one can potentially damage the Integrated Circuit (IC) chip. The energy delivered by human handling or cable discharge can cause unexpected computer and electronic system failures. Understanding of this phenomena, controlling it at IC production and assembly sites, and designing circuits at the IC pins for harmlessly dissipating this energy threat is becoming extremely important for the future of technologies where the transistors are becoming more and more delicate. Demands for faster circuit performance and rapid advances in the IC packaging technology are further adding to the protection design constraints. This seminar will first outline the nature of ESD, the impact of technology advances, the challenges faced by the IC designers, and the specific package development issues that further restrict the ESD design. The seminar will also identify the areas of device and technology research and required innovation to maintain ESD reliability.
        About the Speaker: Charvaka Duvvury is a Texas Instruments Fellow working in the External Device Manufacturing group. He has more than 25 years of experience in the semiconductor industry with specific work on advanced silicon technology research and development. His current work is on development and companywide support on Electrostatic Discharge (ESD) for the nanometer submicron CMOS technologies. He is internationally known for many invited seminars on ESD design for semiconductor ICs. He received his Ph.D. in Engineering Science from the University of Toledo and was a post-doctoral fellow in Physics at the University of Alberta. Dr. Duvvury has published over 130 papers in technical journals and conferences and holds 65 patents with several pending. He has co-authored three books on transistor reliability, modeling for electrical overstress, and ESD design. Dr. Duvvury has been very active in the ESD Symposium where he was the Technical Program Chairman of the 1992 Symposium and was the General Chairman both in 1994 and in 2005. He is a Director on the ESD Association Board since 1997 promoting university advanced research in ESD. He has received the Outstanding University Mentor Award from the Semiconductor Research Corporation and the Outstanding Contributions Award from the ESD Association. He is a member of Sigma XI, Eta Kappa Nu, and is a Fellow of the IEEE.

      6. Wednesday, 1st October, 2008, 0930 hrs
        “Recent advances in Information Theory-Gaussian channels with ideal feedback”
        by : Prof Robert Gallager. Professor Emeritus, MIT, USA.
        Venue: FC Kohli Auditorium, Kanwal Rekhi Building, IIT Bombay
        Jointly with AP/ED Society Chapter and IIT Bombay

        Abstract: The use of feedback on Gaussian channels can not increase capacity, but can greatly decrease delay and error probability. A surprising classical result by Schalkwijk and Kailath demonstrated a class of simple feedback codes for which the probability of decoding error approaches zero doubly exponentially in the constraint length. We use some results of Elias to simplify and optimize this result, getting a simple but exact result for error probability over this class. We next develop a more powerful class of codes for which the error probability approaches zero as a kth order exponential in the constraint length n, and where k is linear in n. This is contrasted with an earlier less general and powerful result by Kramer. Finally we develop the optimal code for transmitting a single binary digit. The above research is motivated not so much by direct interest in the achievable error probability, but rather to understand the feedback role of unconstrained peak amplitudes subject to an average energy constraint.
        About the Speaker: Robert G. Gallager received the BSEE degree from the University of Pennsylvania in 1953, and the S.M. and Sc.D. degrees in electrical engineering from the Massachusetts Institute of Technology in 1957 and 1960, respectively. From 1953 to 1956, he was at Bell Telephone Laboratories and then the U.S. SignalCorps. He joined the MIT faculty in 1960, became Fujitsu Professor in 1988 and is now Professor Emeritus.
        His Sc.D. thesis on “Low Density Parity Check Codes.” won an IEEE IT Society Golden-Jubilee Paper Award in 1998 and is an active area of research today. “A Simple Derivation of the Coding Theorem and some Applications,” won the 1966 IEEE Baker Prize and an IT Society Golden- Jubilee Paper Award in 1998. His book, Information Theory and Reliable Communication, Wiley 1968, placed Information Theory on a firm foundation. In the mid 1970’s, Gallager’s research shifted to data networks. D. Bertsekas and he coauthored the text Data Networks, (Prentice Hall 88, second ed. 92). His joint papers in 93 with Parekh, “A Generalized Processor Sharing Approach to Flow Control in ISN,” won the 93 William Bennett Prize Paper Award and the 93 Infocomm Prize Paper Award. He wrote Discrete Stochastic Processes, Kluwer, in 1996 for graduate students going into the network field. Gallager’s current interests are in information theory, wireless communication, all optical networks, data networks, and stochastic processes. He has just completed a text book Principles of Digital Communication, Cambridge Press, 2008, for graduate students in the communication field. He is proud of his many graduate students over the years, and won the M.I.T. Graduate Student Council Teaching Award for 1993.
        Gallager was involved in the founding of Codex Corporation in 1962 (now part of Motorola) and consulted there for many years. His fundamental studies on quadrature amplitude modulation and detection led directly to the 9600 bps modems that provided Codex’s commercial success. He has consulted for a number of other companies and has received 5 patents. He was President of the Information Theory Society of the IEEE in 1971, Chairman of the Advisory committee to the NSF Division on Networking and Communication Research from 1989 to 1992, and has been on numerous visiting committees for Electrical Engineering and Computer Science departments. His honors include IEEE Fellow (1968), U. of Pa. Moore School Gold Medal Award (1973), Guggenheim Fellow (1978), National Academy of Engioneering (1979), IEEE IT Soc. Shannon Award (1983), IEEE Centennial Medal (1984), IEEE Medal of Honor (1990), National Academy of Sciences (1992), Fellow of the American Academy of Arts and Sciences, (1999), the Technion Harvey Prize in Science and Technology (1999), the Eduard Rhein Prize for basic research ( 2002), and the Marconi Fellowship Award (2003)..

      7. Monday, 29th September, 2008, 1500 hrs
        “A Case study of Basic Research and Core Technology”
        by : Prof Robert Gallager. Professor Emeritus, MIT, USA.
        Venue: FC Kohli Auditorium, Kanwal Rekhi Building, IIT Bombay
        Jointly with AP/ED Society Chapter and IIT Bombay

        Abstract: Information theory was born almost fully developed in 1948 as a result of Claude Shannon’s landmark Mathematical Theory of Communication. Despite widespread speculation that this theory would revolutionize not only communication technology but also the way we think and talk, the applications were quite limited for about 30 years. It was an exciting period of basic mathematical research, but there was little coupling to engineering. The situation has changed markedly in the last 30 years. The information theoretic view that virtually any source of communication is normally translated to a string of bits which are then communicated is commonplace to any teenager using the web. Information theoretic principles (without all the mathematics) are now central to all communication system design.
        We discuss this transition from theory to practice, using personal anecdotes, various landmark events, and a fair amount of speculation. We then discuss the ways in which basic research in technological areas is changing. A critical issue is the mismatch between the slow, uneven, and unpredictable pace of research and the frenetic pace of technological development after the basic ideas are in place. Finally we describe some important but not yet fully understood costs accompanying the enormous success of information age technology.
        About the Speaker: Robert G. Gallager received the BSEE degree from the University of Pennsylvania in 1953, and the S.M. and Sc.D. degrees in electrical engineering from the Massachusetts Institute of Technology in 1957 and 1960, respectively. From 1953 to 1956, he was at Bell Telephone Laboratories and then the U.S. SignalCorps. He joined the MIT faculty in 1960, became Fujitsu Professor in 1988 and is now Professor Emeritus.
        His Sc.D. thesis on “Low Density Parity Check Codes.” won an IEEE IT Society Golden-Jubilee Paper Award in 1998 and is an active area of research today. “A Simple Derivation of the Coding Theorem and some Applications,” won the 1966 IEEE Baker Prize and an IT Society Golden- Jubilee Paper Award in 1998. His book, Information Theory and Reliable Communication, Wiley 1968, placed Information Theory on a firm foundation. In the mid 1970’s, Gallager’s research shifted to data networks. D. Bertsekas and he coauthored the text Data Networks, (Prentice Hall 88, second ed. 92). His joint papers in 93 with Parekh, “A Generalized Processor Sharing Approach to Flow Control in ISN,” won the 93 William Bennett Prize Paper Award and the 93 Infocomm Prize Paper Award. He wrote Discrete Stochastic Processes, Kluwer, in 1996 for graduate students going into the network field. Gallager’s current interests are in information theory, wireless communication, all optical networks, data networks, and stochastic processes. He has just completed a text book Principles of Digital Communication, Cambridge Press, 2008, for graduate students in the communication field. He is proud of his many graduate students over the years, and won the M.I.T. Graduate Student Council Teaching Award for 1993.
        Gallager was involved in the founding of Codex Corporation in 1962 (now part of Motorola) and consulted there for many years. His fundamental studies on quadrature amplitude modulation and detection led directly to the 9600 bps modems that provided Codex’s commercial success. He has consulted for a number of other companies and has received 5 patents. He was President of the Information Theory Society of the IEEE in 1971, Chairman of the Advisory committee to the NSF Division on Networking and Communication Research from 1989 to 1992, and has been on numerous visiting committees for Electrical Engineering and Computer Science departments. His honors include IEEE Fellow (1968), U. of Pa. Moore School Gold Medal Award (1973), Guggenheim Fellow (1978), National Academy of Engioneering (1979), IEEE IT Soc. Shannon Award (1983), IEEE Centennial Medal (1984), IEEE Medal of Honor (1990), National Academy of Sciences (1992), Fellow of the American Academy of Arts and Sciences, (1999), the Technion Harvey Prize in Science and Technology (1999), the Eduard Rhein Prize for basic research ( 2002), and the Marconi Fellowship Award (2003)..

      8. Tuesday, 26th September, 2008
        “National Workshop on IEEE In Rural Area”
        by : Mrs S K Shah, Chairperson, Women In Engineering (WIE) Affinity Group
        Venue: Annasaheb Waghire Jr. College, Otur,Junnar
        Jointly with WIE and IEEE Pune Subsection

      9. Friday, 19th Sept 2008 1400-1800 hrs
        “IEEE: Innovation through Research”
        First Nationwide IEEE User Education Programme in India by INDEST-MHRD Consortium, GIST and IEEE Bombay Section
        Venue: FC Kohli Auditorium, IIT Bombay
      1. Monday, August 25, 2008, 1430 hrs
        “”Spin Polarized Transport & Novel Phenomena in Manganite Nanostructures”
        by : Dr Indranil Das of SINP, Kolkata
        Venue: EE Conference Room, IIT Bombay
        Jointly with AP/ED Society Chapter and IIT Bombay
      2. Monday,7th July, 2008, 1500 hrs
        “Trends in Automotive Steering Systems with Advances in Electrical Actuators and Control”
        by : Dr Tomy Sebastian, Chief Scientist, Delphi Steering, Saginaw, USA
        Venue: Automotive Research Association of India, off Karve Road, Pune
        Jointly with PES/IAS Chapter

      3. Tuesday to Sunday, 1st to 6th July, 2008
        “Workshop on Learn Linux System Administration and Networking + Build Own Linux”
        Venue:Sardar Patel Institute of Technology, Andheri East, Mumbai
        Jointly with Sardar Patel Institute of Technology
      4. Tuesday, 10th June 2008, 1630 hrs
        “Trends in Telecommunication industry”
        by : Celia Desmond, President of World Class – Telecommunications
        Venue: Conference hall, 15th floor, Telephone House, MTNL, Dadar (W)
        Jointly with Communications Society Chapter and IETE Mumbai Centre

        About the Speaker: Celia Desmond is President of World Class – Telecommunications, which provides training in management skills in business and telecommunications engineering environments. She was instrumental in creating a Masters Program and a Certificate Program at University of Toronto. She has lectured internationally on programs for success in today’s changing environment. At Stentor Resource Centre Inc. she was instrumental in establishing the Stentor culture and processes, and in obtaining buy-in from the employees to adopt and grow the new organization. She developed and implemented processes for service/product development and for project governance. As Director – Industry Liaison, she was the external technical linkage to the Stentor owner companies, their customers, and the international technical community In various positions at Bell Canada, Celia provided strategic direction to corporate planners, ran technology and service trials, standardized equipment, and issued guidelines for the member companies. In Celia’s previous line positions, her groups provided technical and project management support to large business clients. She is author of Project Management for Telecommunications Managers, published by Kluwer Academic Publishers (now Springer).
        Celia is the 2007 Director and Secretary of IEEE (Institute of Electrical and Electronics Engineers), and she was 2006 IEEE Vice President – Technical Activities. She is also Vice President Membership for IEEE Engineering Management Society. She was 2002-2003 President of IEEE Communications Society. In 2000-2001 Celia was President of IEEE Canada, and she served her second term on the Board of Directors of IEEE as Region 7 Director. She was 1997-1998 Division III Director. She has twice served in the IEEE Audit Committee, including serving as Chair, and actively participated in numerous other TAB, RAB, IEEE and Society committees. She was 2004 Chair of the IEEE Transnational Committee. She is a member of the Board of Directors of the IEEE Canada Foundation where she is the Donations Chair. Celia was awarded the Donald J. McLellan Award for meritorious service to IEEE Communications Society, the Engineering Institute of Canada John B. Sterling Medal in May 2000, and the IEEE Millennium award. She is a Senior Member of IEEE.
        She is co-editor of Journal of Communication and Information Systems in Brazil, and on the Advisory Board for New Jersey Institute of Technology Engineering Department.
        Celia holds a Masters in Electrical Engineering from Carleton University, a B.Sc. in Mathematics & Psychology from Queens University, an Ontario Teaching Certificate and a Project Management Professional (PMP) certification. Celia has taught kindergarten, high school, and at three universities, Ryerson School of Business, Stevens Institute of Technology, and University of Toronto.

      5. Saturday, 17th May 2008, 1630 hrs
        “40th WORLD TELECOMMUNICATION AND INFORMATION SOCIETY DAY”
        Keynote address on this year’s ITU Theme
        “Connecting Persons with Disabilities: ICT Opportunities for All”
        by : Prof (Ms) A. N. Cheeran, VJTI, Mumbai
        Venue: Central Railway Auditorium, 4th Floor, Parcel Office Bldg., C.S.T. Main, Mumbai – 400 001
        Jointly with Communications Society Chapter, IETE Mumbai Centre, IRSTE Mumbai Chapter, IET Mumbai Network, BESI Mumbai Chapter


      6. Monday, 28th April 2008, 1500 hrs
        “MEMS based biosensors and polymer actuators”
        by : Dr. Sheetal Patil, Research Faculty Dept. of Mechanical Engg., University of Maryland, College Park, MD, USA (currently with the Centre for Excellence in Nanoelectronics, IIT Bombay)
        Venue: Seminar room (next to EE office), Girish Gaitonde Building, Second floor, EE Department, IIT Bombay
        Jointly with AP/ED BOMBAY CHAPTER and IIT Bombay

        Abstract: Great progress is being made in microfabrication, nanotechnology and polymer materials. It is predicted that these technologies will have a significant impact in various applications. Accordingly, in the presentation various aspects of MEMS based biosensors with specific application for detecting Cytokeratin, nanoparticle toxicity and polymer actuators for microrobotics will be discussed in detail.
        Cytokeratin-7 (CK-7), a protein expressed in epithelial tissue, used to differentiate between types of cancers has been detected successfully by employing gold (Au) nanowires as a template for the enzyme immunoassay. Functionalized Au nanowires were used to enhance the sensitivity and selectivity of the cancer biomarkers detection. An enzymatic reaction between alkaline phosphatase enzymes with the p-nitrophenyl phosphate substrate resulted in an electroactive p-nitrophenol and redox active intermediate hydroquinone that has been detected electrochemically. A strong dependence of the anodic peak current with the concentrations of CK-7 resulted in detection down to 10 ng/mL concentration. Additionally, the cross-validation was assured using quantum dots-655 fluorescent markers.
        Bio-MEMS based sensor was used for studying single cells or small groups of cells to determine nanoparticle toxicity. The MEMS structure consists of lidded vials and polymer actuators. The lids are opened and closed by biocompatible polypyrrole/gold bilayer micro-actuators. The present research allows performing parallel multiple tests on distinct populations of cells. Lidded vials were fabricated on the chip to separate the cells cultured on the surface into different populations and to control the timing, dose, and type of nanoparticle exposure.
        New actuator technology based on dielectric elastomers for microrobotics was also developed. Poly (dimethylsiloxane), PDMS, were used without prestrain as a dielectric elastomer actuators (DEAs). These devices were fabricated 100 mm thick actuators of PDMS films with carbon grease electrodes which showed ~15 % strain at 7 kV without pre-strain.
        About the Speaker: Dr. Sheetal J. Patil has received her Ph.D. (2004) in Electronics Science from University of Pune, India. After working as a senior research fellow in Indian Institute of Technology-Bombay (IIT-Bombay), Mumbai, India she joined as a research scientist in the Department of Electrical Engineering at University of South Florida, USA. Since 2007, she was a research faculty at University of Maryland, MD, USA, working on the determination of toxicity of metallic nanoparticles and the development of micro-actuators for drug delivery and microrobotics respectively. Dr. Patil is an expert in microelectronics, nanostructures, thin films, MEMS, biosensors, and polymer actuators.

      7. Thursday, 24th April 2008, 1500 hrs
        “Exploring Nanostructures for applications in various domains”
        by : Dr. Sangeeta Narendra Kale, Reader in Electronics, Department of Electronics-Science Fergusson College, Pune 411 004, India
        Venue: Seminar room (next to EE office), Girish Gaitonde Building, Second floor, EE Department, IIT Bombay
        Jointly with AP/ED BOMBAY CHAPTER and IIT Bombay

        Abstract: Nanostructures have steadily received growing interest as a result of their peculiar properties, ability to organize to form superstructures and applications superior to their bulk counterparts. These materials have potential applications in many areas such as optoelectronics, single electron transistors, catalysis and biomedical applications. As is well known, nanodimensional materials can be realized in two different forms: Firstly, in the form of individual particles or a collection of well-separated particles in colloidal solution; and secondly, 2D and 3D superlattices prepared from tailored nanocrystalline building blocks, which would provide new opportunities to optimize and enhance the properties and performance of conventional devices. The presentation will focus on both these aspects with a glimpse of the work being done in our laboratory. Primary emphasis will be given on manganite-semiconductor heterostructures deposited using Pulsed-Laser deposition system, which have been harnessed for diode-like device applications. La0.7Sr0.3MnO3-SnO2 bilayers deposited on various substrates and their structure-property relationships would be primarily discussed. Using these nanomaterials in their suspension form, work has been done in the area of biomedicine and environmental issues. Manganite nanoparticles have been studied as a cancer hyperthermia agent and semiconductor nanoparticles have been investigated as starch inhibitors for diabetes-control and as a catalyst for dye-degradation in industrial applications (typically ZnO and SnO2, respectively), the results of which will be also presented.

      8. Monday, 21st April 2008, 1430 hrs
        “Characterization for Advanced Semiconductor Technologies”
        by : Dr. Subhash Kulkarni, IBM New York
        Venue: EE Conference Room
        Jointly with AP/ED BOMBAY CHAPTER and IIT Bombay

        Abstract: This talk will cover both technology and functional characterization for semiconductor process technologies in the deep nanometer regime. We start by presenting the scaling landscape for process nodes as we head toward manufacturable 32 nm. We will motivate the vital role played by characterization in taking a technology from the laboratory to high volume high-yield manufacturing. Thereafter we will present important techniques and tools used to measure as well as diagnose manufacturing defects and process variations. We will also emphasize the deep understanding required of device physics and materials processing technologies in order for the characterization engineer to make timely and actionable process recommendations. The seminar will be accompanied by an overview of IBM SRDC by Dr. Madabusi Govindarajan of IBM Bangalore.
        About the Speaker: Dr. Subhash Kulkarni has worked in the semiconductor process and characterization areas for the past 25 years, in the Microelectronics Division of IBM. For the past 6 years he has been responsible for development and manufacturing, starting with 130 and 90nm foundry technology nodes. His broad experience covers Bipolar, CMOS Logic/memory, SOI, eDRAM, and TFT technologies, including FEOL and BEOL process and In Line Test and Wafer Final Test characterization. He was responsible for managing yields by driving process actions for 200mm and 300mm Programs using characterization inputs. He was also the lead engineer responsible for delivery of eCLipze Server and ASIC hardware.
        Dr. Kulkarni holds a Bachelor’s from IIT-Bombay and a PhD in Material Science and Physics, Univ. of Illinois, Urbana. He holds about 20 patents primarily relating to semiconductor process technology and characterization.

      9. Wednesday, 16th April 2008, 1430 hrs
        Talk 1″About NEMS/MEMS WORKS LLC”
        Talk 2″Nanoscale Self Assembly and Its Applications in Sensing, Memory Devices and Energy Generation”
        by : Prof. Shubhra Gangopadhyay & Prof. Keshab Gangopadhyay, University of Missouri- Columbia
        Venue: EE Conference Room, EE Main Building, First Floor
        Jointly with AP/ED BOMBAY CHAPTER and IIT Bombay

        Abstract: Talk-1: Prof. Keshab Gangopadhyay, University of Missouri- Columbia
        The NEMS/MEMS WORKS LLC. (NEMS) was founded in the State of Missouri in 2004. Recently, the University of Missouri-Columbia (UMC) added the economic development of the community as one of the missions of the university and it encourages entrepreneurial activities of the faculty leading to incorporation of start-up companies. In that spirit, NEMS envisages to develop Nanotechnology by accessing the best venture-development minds and resources, development of commercialization plans and fundraising. Through an agreement with UMC, NEMS will have exclusive licenses to all relevant technologies developed and owned by the university. Since 2006, the company has obtained federal Small Business Initiative Research (SBIR) grants to develop synthesis of several nanomaterials, nanoengineering of processes to achieve tunability and scaling-up of these methods. Nanosynthesis processes for several oxidizers and fuels by both bottom-up and top-down methods and self-assembly and physical mixing (called superthermites) of these components by will be discussed. The combustion of some of these nanoenergetic materials can generate shockwaves and one such example will be presented. These results have already been disseminated for public information in research journals. The company has an immediate plan to scale-up the components of these superthermites and manufacture a microdevice for shockwave generation for biomedical applications such as drug delivery and cell transfection. The company has a future plan to diversify in adjacent markets such as surgical tools nanocoatings, microdevice for single cell adhesion and manufacturing of organosillicate nnaoparticles and its applications thereof, such as liquid core waveguides (LCW). Prototypes for some of the microdevices have been developed and several SBIR proposals have been written to improve these technologies further. NEMS is also in dialogue with an investment firm- The Incubation Factory (TIF)- to commercialize the novel products. The company envisages to add an international component to its research and commercialization activities.
        Talk-2:
        Nanoscale Self Assembly and Its Applications in Sensing, Memory Devices and Energy Generation
        by Shubhra Gangopadhyay, La Pierre Chair, Professor, Department of Electrical and Computer Engineering, University of Missouri-Columbia
        Our group is currently working on the integration of top down semiconductor and MEMS processes with bottom up self assembly based chemical synthesis processes. We have several ongoing research projects in the areas of biosensors, nanoengineered energetic materials, bulk and thin films with ordered and random pores and high dielectric constant materials. Here is the summary of some of the research projects I will discuss.
        Microchip-based optical and electrochemical systems for sensing We are currently working on the micro fabrication of an optical system for fluorescence detection. Our goal is to fabricate a compact system utilizing the unique properties of nanoporous materials (low refractive index and large surface area) to fabricate liquid core waveguides. This system is currently tested for HIV virus detection. For electrochemical sensing device, the basic idea of is to use micro fluidic channels and microelectrodes to realize automatic single cell positioning and amperometric detection of small amounts of chemicals release such as catecholamine. We are also fabricating microelectrodes by assembling graphite nanoparticles and carbon nanotubes on chip.
        Novel Nanostructured Energetic Materials Engineered nano-scale composites show promise for energetic material applications because of the removal of diffusion barrier resulting in a fast reaction between fuel and oxidizer. We are currently working on new approaches for self assembling fuel and oxidizer nanocomposites on microchip and utilizing semiconductor chip processing for applications such as power generation, microthrusters and shock waves for nanoparticle based drug delivery.
        Metal Nanoparticle-Dpoed Dielectric Films for Non-Volatile Memory Applications Our research is focused on using gold and silver nanoparticles to enhance the dielectric constant of amorphous HfO2 and Al2O3. Metal nanocrystals of diameter down to 1nm are incorporated in high-K dielectrics for achieving non-volatile memories. Nanocrystal based non-volatile memories are discrete charge storage devices and are strong candidates for replacement of conventional FLASH memories.

      10. March 6-8, 2008     IEEE Conference of AI Tools in Engineering
      11. IEEE Bombay Section Launches the First JOB FAIR… 23rd Feb 2008
      1. Thursday, January 31st, 2008, 1600 Hrs
        “Recent Development in Generalization Error for Supervised Learning Problem with Applications in Model Selection and Feature Selection”
        by : Professor Daniel S Yeung, President IEEE Systems, Man and Cybernetics Society, President of Machine Learning and Cybernetics Research Institute, Hong Kong.
        Venue: Conference Room, GG Bldg., 2nd floor, IIT Bombay
        Jointly with IEEE Systems Man & Cybernetics Chapter, Departments of Electrical Engineering & Computer Science and Engineering, IIT Bombay

        Abstract: Generalization error model provides a theoretical support for a classifier’s performance in terms of prediction accuracy. However, existing models give very loose error bounds. This explains why classification systems generally rely on experimental validation for their claims on prediction accuracy. In this talk we will revisit this problem and explore the idea of developing a new generalization error model based on the assumption that only prediction accuracy on unseen points in a neighbourhood of a training point will be considered, since it will be unreasonable to require a classifier to accurately predict unseen points “far away” from training samples. The new error model makes use of the concept of sensitivity measure for an ensemble of multiplayer feedforward neural networks (Multilayer Perceptrons or Radial Basis Function Neural Networks). Two important applications will be demonstrated, model selection and feature reduction for RBFNN classifiers. A number of experimental results using datasets such as the UCI, the 99 KDD Cup, and text categorization, will be presented.
        About the Speaker: Daniel S. Yeung (Ph.D., M.Sc., M.B.A., M.S., M.A., B.A.) received his Ph.D. in Applied Mathematics from the Case Western Reserve University. He is the President of the IEEE Systems, Man and Cybernetics (SMC) Society, a Fellow of the IEEE and an IEEE Distinguished Lecturer. He received the Ph.D. degree in applied mathematics from Case Western Reserve University. In the past, he has worked as an Assistant Professor of Mathematics and Computer Science at Rochester Institute of Technology, as a Research Scientist in the General Electric Corporate Research Center, and as a System Integration Engineer at TRW, all in the United States. He was the chairman of the department of Computing, The Hong Kong Polytechnic University, Hong Kong, and a Chair Professor from 1999 to 2006. He is now the President of the Machine Learning and Cybernetics Research Institute based in Hong Kong. His current research interests include neural-network sensitivity analysis, data mining, Chinese computing, and fuzzy systems. He was the Chairman of IEEE Hong Kong Computer Chapter (91and 92), an associate editor for both IEEE Transactions on Neural Networks and IEEE Transactions on SMC (Part B), and for the International Journal on Wavelet and Multiresolution Processing. He is a member of the Board of Governor, a Vice President for Technical Activities, and a Vice President for Long Range Planning and Finance for the IEEE SMC Society. He co-founded and served as a General Co-Chair since 2002 for the International Conference on Machine Learning and Cybernetics held annually in China. He also serves as a General Co-Chair (Technical Program) of the 2006 International Conference on Pattern Recognition. He is also the founding Chairman of the IEEE SMC Hong Kong Chapter.
        His past teaching and academic administrative positions include a Chair Professor and Head at Department of Computing, The Hong Kong Polytechnic University, the Head of the Management Information Unit at the Hong Kong Polytechnic University, Associate Head/Principal Lecturer at the Department of Computer Science, City Polytechnic of Hong Kong, a tenured Assistant Professor at the School of Computer Science and Technology and Assistant Professor at the Department of Mathematics, both at Rochester Institute of Technology, Rochester, New York.
        He also held industrial and business positions as a Technical Specialist/Application Software Group Leader at the Computer Consoles, Inc., Rochester, New York, an Information Resource Sub-manager/Staff Engineer at the Military and Avionics Division, TRW Inc., San Diego, California, and an Information Scientist of the Information System Operation Lab, General Electric Corporate Research and Development Centre, Schenectady, New York.

      2. Tuesday, January 29th, 2008, 14.30 Hrs
        “Spoken Term Detection: An Old Problem with A New Twist”
        by : Zak Shafran, Assistant Professor, OGI School of Science & Engineering, at OHSU Portland, USA
        Venue: Conference Room, GG Bldg., 2nd floor, IIT Bombay
        Jointly with Communications Society Bombay Chapter and IIT Bombay

        Abstract: Spoken term detection can be viewed as a new incarnation of the old keyword spotting problem, but this time with a need for scalable algorithms to process massive spoken archives, like a “Google for voice”. This talk will provide an overview of the task, including the definition, the metric and the key challenges, as well as the approach we have adopted in the system fielded by us in collaboration with SRI in the 2006 NIST Spoken Term Detection (STD) evaluation. The system uses a word-based indexing approach, a threshold based on detection theory, and an STT error model to search for words that are out of vocabulary for STT. In addition, the talk will also describe the impact of performance of STT on the STD performance, issues of computational efficiency, and our ongoing work on query expansion in this domain.
        About the Speaker: Izhak (Zak) Shafran is currently an Assistant Professor at OGI School of Science & Engineering in Portland, Oregon. His research is largely focused on modeling speech in the context of large vocabulary speech-to-text, acoustic modeling, spoken term detection, prosody modeling, and language recognition. The application areas of his research ranges from government tasks to medical domain. Before joining OGI, he was a research faculty at the Center for Language and Speech Processing at Johns Hopkins University. After his doctoral from University of Washington, he was a member at AT&T Labs Research in the Speech Algorithms Group, during which he spent a summer at LIMSI (France) as a visiting professor at University Paris Sud.

      3. Friday, January 18th, 2008, 17.30 Hrs
        “WiMAX– A Key Wireless Broadband Technology”
        by : Dr. Suresh Borkar,Department of ECE, Illinois Institute of Technology, Chicago, USA
        Venue: Conference Hall, BSNL Complex, 2nd Floor, A” Wing, Juhu Danda, Santacurz – West, Mumbai – 400 054
        Jointly with Communications Society Bombay Chapter and IETE Mumbai Centre

        Abstract: * Framework – Content * Broadband Wireless Landscape – Applications and Requirements – Introduction to Communications and Networking * WiMAX Standard – Architecture – Network Operations and Management – Inter-relationship with other technologies * Network Evolution – Migration to future networks * Concluding Remarks – Application to India Environment – Summary
        About the Speaker: * 1982-Present: Adjunct Faculty Member and Senior Lecturer, Dept of ECE, Ill Instt of Tech, Chicago – Development of Advanced and Inter-disciplinary Courses * 1980 – 2006: Alcatel-Lucent (formerly AT&T, Lucent) – Director – Mobility / Wireless Development, Integration, and Delivery – CTO and Head – Tata-Lucent JV and Lucent India Inc. – Technical Manager – Telecom Customer Management, Product Management, Architecture, Development, Integration – Distinguished Member of Technical Staff – Computer and Networking Systems Product Management, Architecture, Development, Integration * Also with Zenith Radio Corpn and Tata Electric R&D – Computers, Deflection and Display Systems * Reviewer / Contributor to IEEE * Convener, Panel discussion on India Telecom, Oct 2007, IIT(India) – US Midwest Chapter * B. Tech (IITD), MS and PhD (Ill Instt of Tech), Chicago

      4. Friday, January 11th, 2008, 1600 Hrs
        “Past and future half-centuries for semiconductor device development”
        by : Prof. Hiroshi Iwai, Tokyo Institute of Technology, Japan
        Venue: PS Saxena Hall , IIT Bombay
        Jointly with AP/ED BOMBAY CHAPTER and IIT Bombay Golden Year Celebrations

        Abstract: Electronics is certainly one of the most important technologies emerged in the last century and is expected to further evolve rapidly in the new century. Today, almost all human activities cannot be held without the help of electronics. Electronics started with the invention of vacuum tube about 100 years ago. It developed rapidly with the replacement of vacuum tubes with semiconductor devices in the middle of the last century, and now semiconductor devices are the key for the development of new electronics for future 50 years towards the middle of this century. There have been three aspects for the evolution of semiconductor devices; 1) device structure & operation mechanism, 2) choice of materials, 3) miniaturization of the devices. Already the size of the electronic devices have shrunk more than one million times in the past 100 years from vacuum tube to the most recent CMOS transistors. Now, the miniaturization is approaching its limit, and new paradigm is about to start for the semiconductor device development. In this talk, past 50 years of the semiconductor device development is reviewed and future 50 years for that is predicted.
        About the Speaker: Hiroshi Iwai received the B.E. and Ph.D. degrees in electrical engineering from the University of Tokyo and worked in the research and development of integrated circuit technology for more than 25 years in Toshiba. He is now a professor of Frontier Collaborative Research Center and Dept. of Electronics and Applied Physics, Interdisciplinary Graduate School of Science and Engineering, Tokyo Institute of Technology, Yokohama, Japan. Since joining Toshiba, he has developed several generations of high density static RAM’s, dynamic RAM’s and logic LSI’s including CMOS, bipolar, and Bi-CMOS devices. He has also been engaged in research on device physics, process technologies, and T-CAD related to small-geometry MOSFETs and high-speed bipolar transistors. He has authored and coauthored more than 200 papers.
        He has served on many committees of conferences and editors of journals, as well as a member of many evaluation committees of public organizations. For example, the President of the IEEE EDS, an elected member of the IEEE EDS AdCom, an editor of IEEE EDS Newsletter, a guest editor of IEEE Trans. on Electron Devices, and an editor of the Proceedings of ECS Symp. on ULSI Process Integration. He is now the Jr. Past President of the IEEE EDS. He is also a consultant professor of Huazhong University of Science and Technology, Wuhan, China.
        His awards include Local Commendation for Invention from Japan Institute of Invention and Innovation (1990, 2005), Grand Prize of Nikkei BP Technology Awards (1994), IEEE EDS Paul Rappaport Award (1994), IEICE ES Electronics Award (1998), IEEE EDS J.J.Ebers Award (2001), and JSAP Award for the best paper (2002).
        His current research interests are Nano CMOS and Emerging Technologies: Highk gate insulator, Si Nanowire MOSFETs, CNT FETs, plasma doping for ultra-shallow junctions, Ni salicide, RF CMOS modeling, and Ge transistors.
        Dr. Iwai is, a Fellow of IEEE, a member of Electrochemical Society, a Fellow of the Japan Society Applied Physics, a Member of the Institute of Electronics, Information and Communication Engineers of Japan, and a Member of the Institute of Electrical Engineers of Japan.

      5. Wednesday, January 9th, 2008, 14.30 Hrs
        “Advanced Logic and Memory Technologies with New Materials and Structures”
        by : Prof. Hiroshi Iwai, Tokyo Institute of Technology, Japan
        Venue: EE Seminar Hall, IIT Bombay
        Jointly with AP/ED BOMBAY CHAPTER and IIT Bombay

        Abstract: The Scaling of MOS Technologies has resulted in many unwanted ill-effects and thereby degrading the performance of the transistors. Coupled with these problems one has already reached limits of Gate-insulator Silicon dioxide thickness which is now getting to less than 0.5 nm.This is like a mono layer of atoms and hence uniform growth is just ruled out.The search of new MOS gate insulator was essential and High-K materials are currently being researched with vigor.These materials allow higher thickness of Gate insulator without degrading Electrical performance. But their technology is not yet well within full control and hence the research is needed on many of these High-K candidates like Silicon Nitride, Aluminum Oxide,Hafnium Oxide,Zirconium Oxide,Tantalum Oxide and Lanthanum Oxides. Depending upon the Structure of device for Memories and Logic, being used and the Node of Technology under consideration, one has to decide upon the High-K material. The Talk will address some of the issues of growth and suitability of each of them based on properties of these materials to desired structure.
        About the Speaker: Hiroshi Iwai received the B.E. and Ph.D. degrees in electrical engineering from the University of Tokyo and worked in the research and development of integrated circuit technology for more than 25 years in Toshiba. He is now a professor of Frontier Collaborative Research Center and Dept. of Electronics and Applied Physics, Interdisciplinary Graduate School of Science and Engineering, Tokyo Institute of Technology, Yokohama, Japan. Since joining Toshiba, he has developed several generations of high density static RAM’s, dynamic RAM’s and logic LSI’s including CMOS, bipolar, and Bi-CMOS devices. He has also been engaged in research on device physics, process technologies, and T-CAD related to small-geometry MOSFETs and high-speed bipolar transistors. He has authored and coauthored more than 200 papers.
        He has served on many committees of conferences and editors of journals, as well as a member of many evaluation committees of public organizations. For example, the President of the IEEE EDS, an elected member of the IEEE EDS AdCom, an editor of IEEE EDS Newsletter, a guest editor of IEEE Trans. on Electron Devices, and an editor of the Proceedings of ECS Symp. on ULSI Process Integration. He is now the Jr. Past President of the IEEE EDS. He is also a consultant professor of Huazhong University of Science and Technology, Wuhan, China.
        His awards include Local Commendation for Invention from Japan Institute of Invention and Innovation (1990, 2005), Grand Prize of Nikkei BP Technology Awards (1994), IEEE EDS Paul Rappaport Award (1994), IEICE ES Electronics Award (1998), IEEE EDS J.J.Ebers Award (2001), and JSAP Award for the best paper (2002).
        His current research interests are Nano CMOS and Emerging Technologies: Highk gate insulator, Si Nanowire MOSFETs, CNT FETs, plasma doping for ultra-shallow junctions, Ni salicide, RF CMOS modeling, and Ge transistors.
        Dr. Iwai is, a Fellow of IEEE, a member of Electrochemical Society, a Fellow of the Japan Society Applied Physics, a Member of the Institute of Electronics, Information and Communication Engineers of Japan, and a Member of the Institute of Electrical Engineers of Japan.

      6. December 16th -20th, 2007
        IWPSD -International Workshop on the Physics of Semiconductor Devices
      7. Tuesday, December 18th, 2007, 1500 hrs
        “Heterogeneous Wireless Communication Devices-Present and Future”
        by : Dr Vijay Nair
        Venue: Sameer, IIT Bombay
        Jointly with Communications Society Bombay Chapter and SAMEER

        Abstract: Convergence of communication and computing technologies is rapidly changing the requirement of wireless devices. While wireless wide area network (WWAN) based on cellular radios was evolving, a new set of wireless LAN networks which are fundamentally different from cellular networks emerged. Devices for applications in the wireless LAN networks (WLAN), wireless personal area networks (WPAN) and wireless metro area networks (WMAN) are being deployed in increasing numbers. Bluetooth and Ultra Wideband (UWB) technologies have been introduced for high-bandwidth wireless connectivity in personal area networks. Location identification technologies like GPS are getting integrated with wireless products as well. There is no doubt that tomorrow’s network environment will be extremely heterogeneous.
        However, network heterogeneity also brings with it enormous challenges, as devices will have to be extremely capable in order to intelligently roam around heterogeneous networks operating under a wide range of protocols. As network diversity increases the important challenges of the future communication devices will be coexistence, interoperability and seamless transfer among networks. The vision for ubiquitous computing sees a computational environment where a computer makes decisions and adapts its behavior without being explicitly asked to do so.
        This talk will elaborate the vision, the attributes and technical challenges of heterogeneous wireless communication system. In particular advancements of RF component technologies from antennas to baseband ICs will be elucidated. The evolution of different standards and their impact on the mixed network communication will also be discussed.
        About the Speaker: Vijay joined Intel Corporation in September of 2003. He currently leads a team researching in novel antennas and the integration of antennas into RF front-end modules for mixed network radio applications. His research areas included RF and Microwave devices, monolithic ICs, and wireless subsystems.
        Before joining Intel, he was with Motorola Inc. While at Motorola, he held various positions including Research Manager of RF Technologies Group and Fellow of Member Technical Staff at Motorola Labs. His group at Motorola developed low power devices, high efficiency power amplifiers, and MMICs for communication applications. He was Motorola’s technical lead for the collaborative research with the University of Florence, Italy, on the development of multifunctional quantum MMICs and he also led a collaboration with Arizona State University in active integrated antenna research. His work at Motorola was highlighted by his receiving of Motorola’s “Distinguished Innovator” award, Gold Quill award and “Product & Process Technology” award.
        Vijay holds fifteen (15) US patents. He has published over hundred (100) papers in refereed journals and presented papers in many international conferences and workshops. He has written several chapters for technical books and has co-authored a book titled “RF and Microwave Circuit and Component Design for Wireless Systems”.
        The IEEE – Phoenix Section elected Vijay as the “Senior Engineer of the year-1998”. He was elected as an IEEE Fellow in 2000 in recognition of his work in the development of low power device and integrated circuits. He was elected by MTT society as “Distinguished Microwave Lecturer” for a three year term starting January 2007. He is a member of IEEE Microwave Theory and Technique Society (MTT-S), the Communication Society, Antenna and Propagation Society. He is currently the chairman of Meeting and Symposia committee of MTT Society’s Administrative Committee. He served as the Technical Program Committee Chairman of IEEE International Microwave Symposium (IMS2001), 1997 IEEE RFIC Symposium and 1997 IEEE Vehicular Technology Symposium. He is a member of the Advisory Board and Steering Committee of the RFIC symposium. He also serves as a member of the Technical Program Committee of the IEEE International Microwave Symposium (IMS). He served as the vice chair of the MTT-S publication committee, guest editor of MTT-S Transactions, and as a member of Editorial Board of John Wiley & Son’s publications. He has been the Chairman of RF Components and Subsystems Technical Working Group of the National Electronics Manufacturing, Inc. (NEMI) since 1998. He also serves as the Chairman of US National Committee-Commission A of the International Union of Radio Science (URSI). He holds a masters degree in Physics and in Electrical Engineering from University of Minnesota.

      8. “Annual General Body Meeting”… Notice…Sunday 16th December 2007
        • Slate given by Nominations Committee
        • Minutes of last AGM
        • Secretary Report
    1. Saturday, September 22nd, 2007, 1530 hrs
      “Telecom Operations Support Systems (OSS) – An Overview”
      by : Mr. Aiyappan Pillai, VSNL
      Venue: Usha Mittal Institute of Technology (UMIT), SNDT University, Santacruz (W)
      Jointly with Communications Society Chapter of IEEE Bombay Section
    2. Wednesday, August 8th, 2007, 1530 hrs
      “Related-Key Statistical Cryptanalysis”
      by : Dr. Poorvi Vora, Department of Computer Science, George Washington University
      Venue: KReSIT Seminar Hall
      (Seminar to be broadcasted live to CDEEP Remote Centers)
      Jointly with AP/ED BOMBAY CHAPTER and IIT Bombay

      Abstract: We will present a model for statistical cryptanalysis that treats statistical key-recovery attacks as communication over a low capacity channel, where the channel and the encoding are determined by the cipher and the specific attack. A new attack, related-key recovery, corresponds to the use of a concatenated code over the channel. Unlike classical related-key attacks such as differential related-key cryptanalysis, this attack does not exploit a special structural weakness in the cipher or key schedule, but amplifies the statistical weakness exploited in the basic single key recovery. We show that this attack is more efficient than the single-key-recovery attack in a sense made more precise in the talk. The practical implications of this result are demonstrated through experiments on reduced-round DES. This is joint work with thesis master’s student Darakhshan Mir. Initial work on this subject was presented at ISIT ’06. The ideas are motivated by related work described in IEEE Trans. Info. Theory Aug ’07, Indocrypt ’04 and ISIT ’03
      About the Speaker: Poorvi Vora is Assistant Professor in the Department of Computer Science at George Washington University. Her current areas of interest are cryptology, electronic voting and game theory. She has a Ph.D. (1993) and M.S. (1988) in ECE from North Carolina State University, an M.S. (Math., 1990) from Cornell University, and a B.Tech (EE, 1986) from IIT Bombay. Before GWU, she spent eight years at Hewlett-Packard, where she worked on digital cameras, watermarking and counterfeit deterrence.

    3. Tuesday, 10th July 2007, 1130 hrs
      “Technology progress in advanced gate stack and reliability issues”
      by : Rino Choi, Project manager in Electrical Characterization and Reliability, SEMATECH
      Venue: EE Conference Room, IIT Bombay
      Jointly with AP/ED BOMBAY CHAPTER and IIT Bombay

      Abstract: In the presentation, the efforts to extend the lifetime of CMOS technology will be overviewed and their impact on the device performance/reliability will be summarized. After 30 years of aggressive downsizing of transistors, geometrical scaling has clearly reached fundamental material limits, and is now in the era where further scaling can be realized mainly by new materials and/or device architecture. Traditional gate stacks based on SiO2 and poly-Si are now being replaced by high-k and metal gates. The near term approach to extend CMOS lifetime is to import new gate stack materials such as high-k dielectrics and metal gate electrodes in to traditional CMOS device structures. Recent reports show that the major technical issues impeding the implementation of alternative gate stack materials have been solved. In this presentation, major process and integration approaches and issues will be introduced and the reliability status of the-state-of-the-art devices from this approach will be summarized. This application of new materials brought unique electrical characterization challenges which require different test methodologies for correct assessment. The degradation mechanisms and models are also different from the conventional ones used for silicon based devices. By applying electrical characterization techniques with high time and spatial resolution (in particular, pulsed Id-Vg measurements in the nanoseconds range, variable frequency charge pumping, etc.) along with profiling of the stack composition using high resolution EELS, XPS, ESR, etc., coupled with ab initio modeling of the dielectric atomic structures, electrically active defects have been identified and physical models for device life-time evaluation were developed.

    4. Monday, 9th July 2007, 1430 hrs
      “Overview of R&D in Micron – Is there really that much “room at the bottom”?”
      by : by Chandra Mouli, Senior Fellow & Manager R&D Devices Group, Micron Technology Inc., USA
      Venue:  EE Conference Room,  I.I.T. , Powai , Mumbai
      Jointly with IEEE AP/ED Bombay Chapter and IIT Bombay

      Abstract: This presentation will give an overview of Micron’s corporate R&D division, which develops next generation semiconductor process/devices for three major product segments – DRAM, Flash and CMOS Image Sensors. Micron’s DRAM and Flash components are used in today’s most advanced computing, networking, and communications products,including computers,workstations, servers, cell phones, wireless devices, digital cameras,andgaming systems. Micron is one of the world’s leading CMOS image sensor solutions provider for mobile handset camera markets.
      Second half of the talk will focus specifically on some of the common challenges in these technologies – as devices are scaled down well into nanoscale features.  Practical issues in integrating new materials will be outlined and major concerns related to device fluctuations,variations in characteristics – at the atomic level and their macroscopic manifestations – will be discussed.
      About the Speaker: Chandra Mouli is with Micron Technology Inc, Boise, Idaho. He is currently a Senior Fellow and Manager of the Device Analysis Group in R&D with responsibilities in the area of advanced device characterization and reliability analysis, test structure design and layout, process/device modeling – for all technologies under development in R&D. He received his undergraduate degree in Physics and ME from the Indian Institute of Science in Bangalore, India and Ph.D (EE) from the University of Texas at Austin in 1990. He was with Texas Instruments for couple of years before joining UT/Austin. He is a senior member in IEEE and has served in technical committees for various conferences, including IEDM, SISPAD, IRPS and is currently a member of the ITRS-2007 roadmap committee.

    5. Tuesday , 26th June, 2007, 1100 hrs
      “An Overview of IEEE Computer Society and Research in Computer Vision at the University of South Florida.”
      by :  Prof. Rangachar Kasturi, IEEE CS President-Elect
      and D W Hood Professor and Chair of Dept of CS Engg, Univ of South Florida, Tampa.
      Venue:  KReSIT Seminar Hall,  I.I.T. , Powai , Mumbai
      Jointly with IIT Bombay  (Lecture to be broadcast live to CDEEP Remote Centers)

      Abstract: I will present an overview of IEEE Computer Society’s many programs during the first half of the talk. In the second half I will present a brief introduction to several ongoing research projects in Computer Vision at the University of South Florida. These include text detection in video, collision avoidance for aircraft navigation, and performance evaluation of video object detection and tracking algorithms.
      About the Speaker: Rangachar Kasturi received his BE (Electrical) degree from Bangalore University, India in 1968 and MSEE and Ph.D. degrees from Texas Tech University in 1980 and 1982, respectively. He was a professor of Computer Science and Engineering and Electrical Engineering at the Pennsylvania State University during 1982-2003 and was a Fulbright Scholar during 1999. Dr. Kasturi has been elected to serve as the 2008 President of the IEEE Computer Society. He was the President of the International Association for Pattern Recognition (IAPR) during 2002-04. He has served as the editor-in-chief of the IEEE Transactions on Pattern Analysis and Machine Intelligence and the Machine Vision and Applications journals. Dr. Kasturi is a Fellow of the IEEE and a Fellow of IAPR. He has received the Penn State Engineering Society Premier Research Award and has been inducted into the Texas Tech Electrical Engineering Academy. His research interests are in computer vision and pattern recognition. He is an author of the textbook, Machine Vision, and has published numerous papers and research reference books. He has directed many research projects in document image analysis, video sequence analysis and biometrics. In particular, he is directing a project that evaluates research progress in detection and tracking of faces, people, text, and vehicles in video sequences.

    6. Thursday , 17th May, 2007, 1600 hrs
      39th WORLD TELECOMMUNICATION AND INFORMATION SOCIETY DAY
      ” Connecting the Young: the opportunities of ICT ”
      by : Ms. Sujata Dev Managing Director & CEO, Time Broadband Services Pvt. Ltd.
      Venue: : Western Railway Conference Hall, Second Floor, HQ Office, Churchgate , Mumbai 400 020
      Jointly with   IETE Mumbai Centre, IRSTE Mumbai Chapter, IET Mumbai Networks, & BESI Mumbai Chapter
    7. Tuesday, 24th April 2007, 1430 hrs
      “Microprocessor Platform and Circuit Challenges in the Era of Tera Scale Computing”
      (The talk will cover the what and why of Tera scale computing and briefly go over the platform and circuit technologies needed to get there along with an overview of the research going on at Intel, Bangalore.)
      by : Ms E Vasantha, Head Corporate Technology Group, Intel, Bangalore
      Venue: EE Conference Room, EE Department, IIT Bombay
      Jointly with AP/ED BOMBAY CHAPTER and IIT Bombay

      About the Speaker: Vasantha Erraguntla received her B.E in Electrical Engineering from Osmania University, India and an M.S. in Computer Engineering from University of Louisiana. She joined Intel in 1991 to be a part of the first Teraflop machine design team and worked on its high-speed router technology. In 1995, she joined Intel’s Design Technology team that was responsible for validating performance verification tools for high-speed designs. Since 1997, Vasantha has been engaged in a variety of advanced prototype design activities at Intel Laboratories, implementing and validating research ideas in high performance, low power circuits and high speed signaling. Most recently, since June 2004, Vasantha has been heading Corporate Technology Group’s Bangalore Design Lab to facilitate world-class circuit research and silicon prototype development. Vasantha has co-authored 7 papers and has 6 patents pending. She is also a member of IEEE

    8. Thursday, 12th April 2007 , 1430-1530 hrs
      “High Mobility CMOS Germanium CMOS:”Myths and legends”
      by : Prof. Kirshna C. Saraswat, Dept of EE, Stanford University
      Venue: EE SEMINAR HALL, IIT Bombay
      Jointly with AP/ED BOMBAY CHAPTER and IIT Bombay

      Abstract: Diminishing improvement in the on current (ION) and increase in off current (IOFF) may limit the scaling of bulk Si CMOS. A channel material with high µ and therefore high injection velocity (?inj) can increase ION and reduce delay. Currently, strained-Si is the dominant technology for high performance MOSFETs and increasing the strain provides a viable solution to scaling. However, looking into future scaling of nanoscale MOSFETs it becomes important to look at higher mobility materials, like Ge and III-V together with innovative device structures which may perform better than even very highly strained Si. It is believed that heterogeneous integration of the high mobility materials on Si with novel device structures may take us to sub-20 nm regime. However, one must first answer if high mobility directly translates into high ION and is it possible to get low IOFF especially with low bandgap materials. The high µ materials generally have a lower bandgap (EG), lower effective conductivity mass (m*) and higher dielectric constant (?). Lower EG results in higher IOFF primarily due to band to band tunneling (BTBT) leakage. The main advantage of a semiconductor with a small m* is its high ?inj. However, very high µ materials like InAs and InSb have a very low density of states in the G-valley, which tends to greatly reduce the inversion charge and hence reduced ION. At high gate fields due to quantization the energy levels in G-valley rise faster than L and X-valley, and the current is largely carried in these heavier mass valleys, thus reducing the advantage of high µ. Therefore for both Ge and III-V devices problems of obtaining high on current and leakage need to be solved. Recent results suggest that Ge/Si heterostructures will be suitable to satisfy the p-MOS requirements, however, there appear to be severe limitations of n-MOS. High electron mobility III-V materials could be suitable for n-MOS. However, novel heterostructures will be needed to exploit the promise advantages of Ge and III-V based devices.
      About the Speaker: Prof. Krishna Saraswat is Rickey/Nielsen Professor in the School of Engineering, Professor of Electrical Engineering and Professor of Materials Science & Engineering (by courtesy) at Stanford University. He received Ph.D. in Electrical Engineering from Stanford University in 1974. He serves as the Chair of Stanfords Materials Council and as the Associate Director of the NSF/SRC Engineering Research Center for Environmentally Benign Semiconductor Manufacturing. He also serves on the leadership council of the MARCO Focus Center for Materials, Structures, and nano-Devices. His research interests are in new and innovative materials, structures, and process technology of silicon, germanium and III-V devices and interconnect for nanoelectronics. Prof. Saraswat has graduated more than 50 doctoral students and has authored or co-authored over 500 technical papers, of which six have received Best Paper Award. He is a Fellow of the IEEE, and a member of both The Electrochemical Society and The Materials Research Society. He received the Thomas Callinan Award from The Electrochemical Society in 2000 for his contributions to the dielectric science and technology. He is the recipient of the 2004 IEEE Andrew Grove Award for seminal contributions to silicon process technology.

    9. Wednesday, 11th April 2007 , 1430-1530 hrs
      “CMOS and beyond”
      by : Prof. Kirshna C. Saraswat, Dept of EE, Stanford University
      Venue: EE SEMINAR HALL, IIT Bombay
      Jointly with AP/ED BOMBAY CHAPTER and IIT Bombay

      Abstract: It is believed that below the 65 nm node although the conventional bulk CMOS can be scaled, however, without appreciable performance gains. To continue the scaling of Si CMOS in the sub-65 nm regime, innovative device structures and new materials have to be created in order to continue the historic progress in information processing and transmission. Examples of novel device structures being investigated are double gate or surround gate MOS and examples of novel materials are high mobility channel materials like strained Si and Ge, III-V semiconductors, high-k gate dielectrics and metal gate electrodes. Heterogeneous integration of these materials on Si with novel device structures may take us to sub-20 nm regime, but will require new fabrication technology solutions that are generally compatible with current and forecasted installed Si manufacturing. Beyond that we will need a set of potentially entirely different information processing and transmission devices from the transistor as we know it, e.g. silicon-based quantum-effect devices, nanotube electronics and molecular and organic semiconductor electronics
      About the Speaker: Prof. Krishna Saraswat is Rickey/Nielsen Professor in the School of Engineering, Professor of Electrical Engineering and Professor of Materials Science & Engineering (by courtesy) at Stanford University. He received Ph.D. in Electrical Engineering from Stanford University in 1974. He serves as the Chair of Stanfords Materials Council and as the Associate Director of the NSF/SRC Engineering Research Center for Environmentally Benign Semiconductor Manufacturing. He also serves on the leadership council of the MARCO Focus Center for Materials, Structures, and nano-Devices. His research interests are in new and innovative materials, structures, and process technology of silicon, germanium and III-V devices and interconnect for nanoelectronics. Prof. Saraswat has graduated more than 50 doctoral students and has authored or co-authored over 500 technical papers, of which six have received Best Paper Award. He is a Fellow of the IEEE, and a member of both The Electrochemical Society and The Materials Research Society. He received the Thomas Callinan Award from The Electrochemical Society in 2000 for his contributions to the dielectric science and technology. He is the recipient of the 2004 IEEE Andrew Grove Award for seminal contributions to silicon process technology.

    10. Saturday, 31st Mar, 2007, 1700 hrs
      “Internet Banking
      by Prof. Ward Hanson, Stanford University
      Venue: Western Railway Conference Hall, Second Floor, HQ Office, Churchgate, Mumbai
      Jointly with IETE, IET and IRSTE
    11. Saturday 3rd Mar 2007, Year 2007 Prof K Shankar Student Paper and Project Contest
      Venue: SPCE, Andheri (West)
      The last date for Submitting the papers and Project ideas : Tuesday 27th Feb 2007
      The date of presentation of the selected papers and projects : Saturday 3rd Mar 2007
    12. Tuesday, 27th Feb, 2007, 1230 – 16.30 hrs
      Lunch meeting with Directors of Communications Society of IEEE
      IEEE Bombay Section has organised a lunch meeting with a high level team of Directors of the Communications Society of IEEE with special invitees from the industry for a face to face interaction.
      The team comprises of :
      Dr Doug Zuckerman
      President Elect of the Communications Society, IEEE
      Dr Roberto Saracco
      CTO, Telecom, Italia
      Member Strategic Board of IEEE
      Director of Communications Society for Sister Societies, IEEE
      Venue : The Lotus Suites, Andheri Kurla Road, Andheri (E), Mumbai between 12.30 to 4.30 pm on February 27, 2007.
    13. Monday, 26th Feb, 2007, 1430 hrs
      “Is there a Future for Telecommunications?”
      “Looking into Today’s Situation and Challenges Lying Ahead”
      by Dr. Roberto Saracco, CTO, Telecom, Italia And Member Strategic Board of IEEE
      Venue: KReSIT Seminar Hall , I.I.T. , Powai , Mumbai
      (Lecture to be broadcasted live to CDEEP Remote Centers)
      Jointly with IEEE ComSoc Bombay Chapter and IIT Bombay

      Abstract:Technology evolution is not just fast, to a good extent it is also predictable. However, the market uptake of technology, the variety of culture, regulation and individual enterprise strategy can significantly change the evolution.
      The talk looks into a few technology road maps, storage, processing, display, sensors, energy, and stimulate thinking on what all that might mean to the business. In a global world any party is subject to forces emerging near and far away. At the same time the impact of any single enterprise can have a global reach.
      COMSOC because of its global reach and the breadth of its technology interest, the variety of players involved in COMSOC life and events can be a most suitable beacon to understand and influence the evolution.
      About the Speaker Roberto Saracco has over 35 years of experience in telecommunications. His first research focus was on switching, data networks and network management. In the last ten years he has shifted the focus on the economic side of the equation, heading a research team to analyze the impact of technology evolution on biz and value chains.
      In the 1999-2001 he has led a World Bank project to stimulate enterprise innovation in Latin America that led to over a hundred innovation projects. From 2001 to 2004 he led the Future Centre in Venice then he moved back to the Turin research labs of Telecom Italia to lead a scenario groups.
      In the 1999-2001 he has led a World Bank project to stimulate enterprise innovation in Latin America that led to over a hundred innovation projects. From 2001 to 2004 he led the Future Centre in Venice then he moved back to the Turin research labs of Telecom Italia to lead a scenario groups. 

    14. Tuesday, 13th Feb 2007, 1500 hrs
      “The Euclidean Direction Search (EDS) Adaptive Filtering Algorithm: Theory and Applications”
      by : Dr. Tamal Bose, Director Center for High-speed Information Processing Utah State University
      Venue: EE Seminar Hall, IIT Bombay
      Jointly with COMSOC BOMBAY CHAPTER and IIT Bombay

      Abstract: The Euclidean Direction Search (EDS) adaptive filtering algorithm minimizes a least-squares cost function by moving in Euclidean coordinate directions. This talk presents a convergence analysis of the EDS algorithm, showing that EDS is formally equivalent to Gauss-Seidel iteration for the solution of linear equations, and that the EDS has zero excess mean-square error for stationary signals. It is also shown that the convergence rate is sensitive to the condition number of the covariance matrix. Several applications of the EDS algorithm are presented including, system identification, channel equalization, and linear prediction. In particular, the application of this algorithm is explored in detail for hyperspectral image processing.
      About the Speaker: Tamal Bose received the Ph.D. degree in electrical engineering from Southern Illinois University in 1988. After faculty positions at the Citadel and the University of Colorado, he joined Utah State University in 2000 as an Associate Professor. Currently, he is the Department Head & Professor of Electrical and Computer Engineering and the Director of the Center for High-speed Information Processing (CHIP). The research interests of Dr. Bose include adaptive filtering algorithms, nonlinear effects in digital filters, and multidimensional system theory. He is author of the text Digital Signal and Image Processing, John Wiley, 2004. He is also the author or co-author of over 100 technical papers. Dr. Bose served as the Associate Editor for the IEEE Transactions on Signal Processing from 1992 to 1996. He is currently on the editorial board of the IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, Japan. He also served on the organizing committees of several international conferences. Dr. Bose received the 2002 Researcher of the Year award from the College of Engineering at Utah State University and the 2002 Teacher of the Year award from the department of Electrical and Computer Engineering. He received the Researcher of the Year and Service Person of the Year awards at the University of Colorado at Denver. He also received two Exemplary Researcher awards from the Colorado Advanced Software Institute. He is an IEEE EAC program evaluator and a member of the DSP Technical Committee for the IEEE Circuits and Systems society.

    15. Tuesday, 16th Jan 2007, 1430 hrs
      “A LOW POWER AND HIGH PERFORMANCE 5 GHz SRAM CIRCUIT DESIGN WITH IMPROVED CELL STABILITY”
      by : Dr. Rajiv V. Joshi, Research staff member at T. J. Watson research center, IBM
      Venue: EE Seminar Hall, IIT Bombay
      Jointly with AP/ED BOMBAY CHAPTER and IIT Bombay

      Abstract: An embedded CMOS static random access memory (SRAM), including the array and a method of accessing cells in the array with improved cell stability for scalability and performance (over 5 GHz) is demonstrated in hardware using 65 nm Partially Depleted Silicon on Insulator (PD SOI) technology. The design features shorter bitlines (16 cells/bitline) along with a thin cell layout and programmable domino read operation. Bit lines connected to half selected cells in the array are floated during cell accesses for improved cell stability. In addition, the SRAM is supplied with multiple supplies: one to the cells, wordline drivers, and level shifters, and the other to the bitline and remaining logic to improve stability and lower power.
      About the Speaker: Dr. Rajiv V. Joshi is a research staff member at T. J. Watson research center, IBM. He received his B.Tech degree from Indian Institute of Technology (Bombay, India), M.S degree from Massachusetts Institute of Technology and Doctorate in Eng. Science from Columbia University, USA. From 1981 to 1983, he with GTE research lab in Waltham, Massachusetts. He joined IBM in Nov. 1983, and since then is working in VLSI design systems, science and technology. He worked on 1.25m NMOS, and CMOS, sub-0.5m CMOS logic, DRAM and SRAM technologies. He developed novel interconnect processes and structures for Aluminum, tungsten and Copper technologies which are widely used in IBM for various sub-0.5m memory and logic technologies as well as across the globe. His circuit related work includes design of register files, registers, latches, L1 caches, Directory, TLB, IO circuits development of physical design tools, and CAD based library generation and circuit designs in SOI technology. He contributed to S/390 Alliance processor design, working in both circuit design and CAD tools. The Alliance G5 chip was a very successful IBM product and Joshi received IBM Research Division Awards for his contributions to it and each of the follow-on processor designs. His 2 GHz SRAM design for G6 received Outstanding technical achievement award. His work also involved design related to SRAM designs, which are widely used across IBM System 390. He has won twenty-nine invention plateau achievement awards from IBM and won two patent portfolio awards for cross-licensing and utilization of his patents in the IBM products. He has received 5 Research Division Awards, and several top 5% and top 30% patent awards (for licensing activities). He won top 5% patent related to steady state timing in SOI. On June 6, 2002 he received Corporate Patent Portfolio award from IBM. He won 2nd corporate patent portfolio award on May 26, 2004. He is a master inventor & key technical leader at IBM research division. He has authored and co-authored over 100 research papers and presented several invited talks. He holds 83 U.S. patents in addition to 40 pending patents. He received the Lewis Winner Award in 1992 for an outstanding paper he coauthored at the International Solid State Circuit Conference. He was instrumental in starting interconnect workshop in early 1980s. He chaired advanced interconnect conferences sponsored by MRS and served as an editor of the proceedings. He is elected as an IEEE fellow for 2002 for contributions to chip metallurgy materials and processes, and high performance processor and circuit design. He is actively involved in IEEE ISLPED (Int. Symposium Low Power Electr. Design) IEEE VLSI design, IEEE Int. SOI conf Program committees. He served as a program chair for Low Power Symposium 2003 and is a general chair for 2004. Joshis patent was the top patent of the decade.

    16. Thursday, 4th Jan 2007, 1430 hrs
      “Challenges in Advanced Technologies and Enablement”
      by : Dr. David Harame IBM Semiconductor Research and Development Center Essex Junction,Vermon
      Venue: EE Conference Room, IIT Bombay
      Jointly with AP/ED BOMBAY CHAPTER and IIT Bombay

      Abstract: IBM offers advanced SOI and CMOS technologies for servers and digital foundry in and has 45nm and 32nm in development. The CMOS performance roadmap has significant performance issues which are being resolved not by conventional scaling but by innovation. RF/AMS technologies in RFCMOS and SiGe BiCMOS are also developed. RFCMOS will have significant design challenged at advanced nodes. Some of these challenges will be discussed. SiGe BiCMOS is reaching very high performance levels of 300 and 400 Ghz. Scaling issues in SiGe BiCMOS will also be discussed. These technologies are only useful if there are good models and process design kits which address the SOI, CMOS, RFCMOS, and SiGe BICMOS technologies issues. Some key attributes of advanced models and design kits will be discussed.
      About the Speaker: David Harame received the PhD in Electrical Engineering from Stanford University in 1984. He joined IBM in 1984 at the T.J. Watson Research Center in Yorktown Heights NY where he immediately began working on using epitaxial growth techniques in silicon technology to improve device performance. He worked on both SiGe HBTs and SiGe Channel FETs. Dr. Harame was involved with the SiGe HBT work at IBM from its inception and is widely credited for taking the technology from research to manufacturing. During that time he moved from Yorktown to the Advanced Semiconductor Technology Center in Hopewell Junction NY and developed the first fully qualified for manufacturing SiGe HBT process. He then worked on SiGe BiCMOS and moved to Essex Junction Vermont where he developed the first fully manufacturing qualified SiGe BiCMOS process in a large volume fabricator. Dr. Harame now lives in Essex Junction Vermont where he is the Director of IBM’s Semiconductor Research and Development Center Enablement Area. This area provides Models and Design Kits for IBM’s Semiconductor Technologies. David was the General Program Chair for the 2005 IEEE Bipolar BiCMOS Circuits and Technology Meeting, and the Symposium Organizer for the 2004 and 2006 Electrochemical Society SiGe: Materials, Processing, and Devices Symposium. He has authored or co-authored over 160 articles and holds 16 patents. He is a member of the IBM Academy, an IBM Fellow. and an IEEE Fellow.

    17. Tuesday, 2nd January, 2007 , 1400 hrs
      “High Mobility Materials and Novel Device Structures for High Performance Nanoscale MOSFETs”
      by Prof. Krishna C. Saraswat, Department of Electrical Engineering, Stanford University, Stanford
      Venue: EE Seminar Hall, IIT ,Powai , Mumbai
      Jointly with AP/ED Chapter and IIT Bombay
    18. “Annual General Body Meeting”… Notice…Saturday 23rd December 2006
      • Slate given by Nominations Committee
      • Minutes of last AGM
      • Calendar of Main Events
      • Secretary Report

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